LT3757HMSE#PBF Linear Technology, LT3757HMSE#PBF Datasheet - Page 12

• Manufacturer Part Number: LT3757HMSE#PBF
• Description: IC DC-DC CTRLR ADJ 10MSOP
• Manufacturer: Linear Technology
• Type: Step-Up (Boost), Inverting, Flyback, Sepicr

Specifications of LT3757HMSE#PBF

• Internal Switch(s): No
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Frequency - Switching: 100kHz ~ 1MHz
• Voltage - Input: 2.9 ~ 40 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP Exposed Pad, 10-HMSOP, 10-eMSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Voltage - Output: -
• Power - Output: -

applicaTions inForMaTion
LT3757
The operating frequency of the LT3757 can be synchronized
to an external clock source. By providing a digital clock
signal into the SYNC pin, the LT3757 will operate at the
SYNC clock frequency. If this feature is used, an R
should be chosen to program a switching frequency 20%
slower than SYNC pulse frequency. The SYNC pulse should
have a minimum pulse width of 200ns. Tie the SYNC pin
to GND if this feature is not used.
Duty Cycle Consideration
Switching duty cycle is a key variable defining converter
operation. As such, its limits must be considered. Minimum
on-time is the smallest time duration that the LT3757 is
capable of turning on the power MOSFET. This time is
generally about 220ns (typical) (see Minimum On-Time
in the Electrical Characteristics table). In each switching
cycle, the LT3757 keeps the power switch off for at least
220ns (typical) (see Minimum Off-Time in the Electrical
Characteristics table).
The minimum on-time and minimum off-time and the
switching frequency define the minimum and maximum
switching duty cycles a converter is able to generate:
Minimum duty cycle = minimum on-time • frequency
Maximum duty cycle = 1 – (minimum off-time • frequency)
Programming the Output Voltage
The output voltage (V
shown in Figure 1. The positive and negative V
by the following equations:
The resistors R1 and R2 are typically chosen so that
the error caused by the current flowing into the FBX pin
during normal operation is less than 1% (this translates
to a maximum value of R1 at about 158k).

V
V
OUT POSITIVE
OUT NEGATIV
,
,
E E
=
=
1 6
– .
.
0 8
OUT
V
•
V
) is set by a resistor divider, as

 
•
1

 
+
1
R
R
+
2
1
R
R

 
2
1

 
OUT
T
resistor
are set
Soft-Start
The LT3757 contains several features to limit peak switch
currents and output voltage (V
start-up or recovery from a fault condition. The primary
purpose of these features is to prevent damage to external
components or the load.
High peak switch currents during start-up may occur in
switching regulators. Since V
the feedback loop is saturated and the regulator tries to
charge the output capacitor as quickly as possible, resulting
in large peak currents. A large surge current may cause
inductor saturation or power switch failure.
The LT3757 addresses this mechanism with the SS pin. As
shown in Figure 1, the SS pin reduces the power MOSFET
current by pulling down the VC pin through Q2. In this way
the SS allows the output capacitor to charge gradually to-
ward its final value while limiting the start-up peak currents.
The typical start-up waveforms are shown in the Typical
Performance Characteristics section. The inductor current
I
Besides start-up, soft-start can also be triggered by the
following faults:
1. INTV
2. INTV
3. Thermal lockout
Any of these three faults will cause the LT3757 to stop
switching immediately. The SS pin will be discharged by
Q3. When all faults are cleared and the SS pin has been
discharged below 0.2V, a 10µA current source I
charging the SS pin, initiating a soft-start operation.
The soft-start interval is set by the soft-start capacitor
selection according to the equation:
L
slewing rate is limited by the soft-start function.
T
SS
=
C
CC
CC
SS
> 17.5V
< 2.6V
•
. 1 25
10
µA
V
OUT
is far from its final value,
OUT
) overshoot during
S2
starts
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