LT1777CS#PBF Linear Technology, LT1777CS#PBF Datasheet - Page 16

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LT1777CS#PBF

Manufacturer Part Number
LT1777CS#PBF
Description
IC SWREG STP-DWN LOWNOISE 16SOIC
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LT1777CS#PBF

Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
1.24 ~ 30 V
Current - Output
700mA
Frequency - Switching
100kHz
Voltage - Input
12 ~ 48 V
Operating Temperature
0°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Primary Input Voltage
48V
No. Of Outputs
1
Output Voltage
40.8V
Output Current
1A
No. Of Pins
16
Operating Temperature Range
0°C To +125°C
Msl
MSL 1 - Unlimited
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-

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APPLICATIONS
LT1777
As an example, assume that the capacitance between the
V
the high impedance node in question exhibits a capaci-
tance of 1pF to ground. Also assume a “typical” 36V
5V
the V
high impedance pin, causing abnormal operation. An
explicit 100pF capacitor added to the node will reduce the
amplitude of the disturbance to more like 35mV (although
settling time will increase).
16
SW
OUT
node and a high impedance pin node is 0.1pF, and that
SW
application. Due to the large voltage excursion at
node, this will couple a 3.5V(!) transient to the
U
INFORMATION
U
W
U
IN
to
Specific pin recommendations are as follows:
explicit compensation network. A value of one-tenth of
the main compensation capacitor is recommended, up
to a maximum of 100pF.
FB: Assuming the V
usually requires no explicit capacitor of its own, but
keep this node physically small to minimize stray
capacitance.
SHDN: If unused, add a 100pF capacitor to ground.
SYNC: Ground if unused.
V
C
: Add a capacitor directly to ground in addition to the
C
pin is handled properly, this pin

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