LTC1773EMS Linear Technology, LTC1773EMS Datasheet - Page 8

• Manufacturer Part Number: LTC1773EMS
• Description: IC CTRLR DC/DC SYNC STPDN 10MSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC1773EMS

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.8 ~ 8.5 V
• Current - Output: 6A
• Frequency - Switching: 550kHz
• Voltage - Input: 2.65 ~ 8.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

APPLICATIONS
LTC1773
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. However, oper-
ating at a higher frequency generally results in lower
efficiency because of external MOSFET gate charge losses.
The inductor value has a direct effect on ripple current. The
ripple current, ∆I
frequency and increases with higher V
Accepting larger values of ∆I
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is 30% to 40% of I
the maximum ∆I
The inductor value also has an effect on Burst Mode
operation. The transition to low current operation begins
when the inductor current peaks fall to approximately 1/3
its original value. Lower inductor values (higher ∆I
cause this to occur at lower load currents, which can cause
a dip in efficiency in the upper range of low current
operation. In Burst Mode operation, lower inductance
values will cause the burst frequency to increase.
Inductor Core Selection
Once the value for L is known, the type of inductor must be
selected. High efficiency converters generally cannot af-
ford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite, molypermalloy,
or Kool Mµ
size for a fixed inductor value, but it is very dependent on
inductance selected. As inductance increases, core losses
go down. Unfortunately, increased inductance requires
more turns of wire and therefore copper losses will in-
crease. Ferrite designs have very low core losses and are
preferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard”, which means that
inductance collapses abruptly when the peak design cur-
rent is exceeded. This results in an abrupt increase in
8
∆I
L
=
( )( )
f L
®
1
cores. Actual core loss is independent of core
V
L
OUT
L
, decreases with higher inductance or
occurs at the maximum input voltage.
U
⎛
⎜
⎝
1–
INFORMATION
U
V
V
OUT
IN
L
⎞
⎟
⎠
allows the use of lower
W
IN
MAX
or V
. Remember,
OUT
U
.
L
) will
(1)
inductor ripple current and consequent output voltage
ripple. Do not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive than
ferrite. A reasonable compromise from the same manu-
facturer is Kool Mµ. Toroids are very space efficient,
especially when you can use several layers of wire. Be-
cause they generally lack a bobbin, mounting is more
difficult. However, new designs for surface mount are
available which do not increase the height significantly.
Power MOSFET and Schottky Diode Selection
Two external power MOSFETs must be selected for use
with the LTC1773: a P-channel MOSFET for the top (main)
switch, and an N-channel MOSFET for the bottom (syn-
chronous) switch.
The peak-to-peak gate drive levels are set by the V
voltage. Therefore, for V
MOSFETs should be used. But, for V
level threshold MOSFETs (V
In these applications, make sure that the V
LTC1773 is less than 8V because the absolute maximum
V
MOSFETs is 8V.
Selection criteria for the power MOSFETs include the “ON”
resistance R
input voltage, maximum output current, and total gate
charge. When the LTC1773 is operating in continuous
mode the duty cycles for the top and bottom MOSFETs are
given by:
The MOSFET power dissipations at maximum output
current are given by:
GS
Main Switch Duty Cycle = V
Synchronous Switch Duty Cycle = (V
P
MAIN
rating of the majority of these sub-logic threshold
=
K V
( ) (
V
DS(ON)
V
OUT
IN
IN
2
(
I
I
MAX
, reverse transfer capacitance C
MAX
)(
)
2
C
(
IN
1 δ
RSS
+
GS(TH)
> 5V, logic-level threshold
OUT
)( )
)
R
f
DSON
/V
< 3V) should be used.
IN
IN
+
IN
< 5V, sub-logic
– V
OUT
IN
)/V
to the
IN
RSS
1773fb
IN
,