LTC1261LCMS8#TRPBF Linear Technology, LTC1261LCMS8#TRPBF Datasheet - Page 7
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LTC1261LCMS8#TRPBF
Manufacturer Part Number
LTC1261LCMS8#TRPBF
Description
IC VOLT INVERT SW-CAP ADJ 8-MSOP
Manufacturer
Linear Technology
Type
Switched Capacitor (Charge Pump), Invertingr
Datasheet
1.LTC1261LCMS8PBF.pdf
(12 pages)
Specifications of LTC1261LCMS8#TRPBF
Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
-1.23 ~ -5 V
Current - Output
20mA
Frequency - Switching
650kHz
Voltage - Input
2.7 ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APPLICATIONS
COMP2 also monitors the divided signal at ADJ but it is
connected to a 1.17V reference, 5% below the main
reference voltage. When the divided output exceeds this
lower reference voltage indicating that the output is within
5% of the set value, COMP2 goes high turning on the REG
output transistor. This is an open drain N-channel device
capable of sinking 4mA with a 3.3V V
V
5% below V
damage up to a maximum of 6V above ground. Note that
the REG output only indicates if the magnitude of the
output is below the magnitude of the set point by 5% (i.e.,
V
output is forced higher than the magnitude of the set point
( i.e., to – 5.25V when the output is set for – 5V) the REG
output will stay low.
OUTPUT RIPPLE
Output ripple in the LTC1261L is present from two sources;
voltage droop at the output capacitor between clocks and
frequency response of the regulation loop. Voltage droop
is easy to calculate. With a typical clock frequency of
650kHz, the charge on the output capacitor is refreshed
once every 1.54 s. With a 15mA load and a 3.3 F output
capacitor, the output will droop by:
This can be a significant ripple component when the
output is heavily loaded, especially if the output capacitor
is small. If absolute minimum output ripple is required, a
10 F or greater output capacitor should be used.
Regulation loop frequency response is the other major
contributor to output ripple. The LTC1261L regulates the
output voltage by limiting the amount of charge trans-
ferred to the output capacitor on a cycle-by-cycle basis.
The output voltage is sensed at the ADJ pin (COMP for
fixed output voltage versions) through an internal or
external resistor divider from the OUT pin to ground. As
the flying capacitor is first connected to the output, the
output voltage begins to change quite rapidly. As soon as
it exceeds the set point COMP1 trips, switching the state
I
LOAD
CC
OUT
. When in the “off” state (divided output is more than
> – 4.75V for a – 5V set point). If the magnitude of the
C
OUT
t
REF
= 15mA
) the drain can be pulled above V
U
1.54 s
INFORMATION
3.3 F
U
= 7mV
W
CC
and 5mA with a 5V
CC
U
without
of the charge pump and stopping the charge transfer.
Because the RC time constant of the capacitors and the
switches is quite short, the ADJ pin must have a wide AC
bandwidth to be able to respond to the output in time.
External parasitic capacitance at the ADJ pin can reduce
the bandwidth to the point where the comparator cannot
respond by the time the clock pulse finishes. When this
happens the comparator will allow a few complete pulses
through, then overcorrect and disable the charge pump
until the output drops below the set point. Under these
conditions the output will remain in regulation but the
output ripple will increase as the comparator “hunts” for
the correct value.
To prevent this from happening, an external capacitor can
be connected from ADJ (or COMP for fixed output voltage
parts) to ground to compensate for external parasitics and
increase the regulation loop bandwidth (Figure 2). This
sounds counterintuitive until we remember that the inter-
nal reference is generated with respect to OUT, not ground.
The feedback loop actually sees ground as its “output,”
thus the compensation capacitor should be connected
across the “top” of the resistor divider, from ADJ (or
COMP) to ground. By the same token, avoid adding
capacitance between ADJ (or COMP) and V
slow down the feedback loop and increase output ripple.
A 100pF capacitor from ADJ or COMP to ground will
compensate the loop properly under most conditions for
fixed voltage versions of the LTC1261L. For the adjustable
LTC1261L, the capacitor value will be dependent upon the
values of the external resistors in the divider network.
REF
Figure 2. Regulator Loop Compensation
TO CHARGE
COMP1
PUMP
+
–
1.23V
R1
R2
1261L F02
RESISTORS ARE
INTERNAL FOR FIXED
OUTPUT VOLTAGE PARTS
ADJ/COMP
V
OUT
LTC1261L
OUT
C
100pF
C
. This will
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