LTC3240EDC-3.3#TRPBF Linear Technology, LTC3240EDC-3.3#TRPBF Datasheet - Page 11
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LTC3240EDC-3.3#TRPBF
Manufacturer Part Number
LTC3240EDC-3.3#TRPBF
Description
IC DC/DC CONV 3.3V 6-DFN
Manufacturer
Linear Technology
Type
Step-Down (Buck), Step-Up (Boost), Switched Capacitor (Charge Pump)r
Datasheet
1.LTC3240EDC-3.3TRMPBF.pdf
(12 pages)
Specifications of LTC3240EDC-3.3#TRPBF
Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
3.3V
Current - Output
150mA
Frequency - Switching
1.2MHz
Voltage - Input
1.8 ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
6-DFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC3240EDC-3.3#TRPBFLTC3240EDC-3.3#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LTC3240EDC-3.3#TRPBFLTC3240EDC-3.3#TRMPBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
PACKAGE DESCRIPTIO
APPLICATIO S I FOR ATIO
Figure 5. Maximum Power Dissipation vs Ambient Temperature
2.50 ±0.05
1.15 ±0.05
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
TOP AND BOTTOM OF PACKAGE
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.0
2.5
2.0
1.5
1.0
0.5
0.61 ±0.05
(2 SIDES)
0
– 50
θ
JA
– 25
= 80°C/W
RECOMMENDED
U
AMBIENT TEMPERATURE (°C)
OPERATION
0
T
J
= 125°C
1.42 ±0.05
(2 SIDES)
25
U
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
50
THERMAL
SHUTDOWN
T
0.50 BSC
J
75
= 160°C
W
0.25 ± 0.05
0.675 ±0.05
100 125
U
PACKAGE
OUTLINE
LT3240 F05
150
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703)
U
(SEE NOTE 6)
TOP MARK
PIN 1 BAR
DC Package
0.200 REF
This derating curve assumes a maximum thermal resis-
tance, θ
be achieved from a printed circuit board layout with a solid
ground plane and a good connection to the ground pins of
LTC3240 and the Exposed Pad of the DFN package.
It is recommended that the LTC3240 be operated in the
region corresponding to T
tion as shown in Figure 5. Short term operation may be
acceptable for 125°C ≤ T
in this region should be avoided as it may reduce the life of
the part or cause degraded performance. For T
the part will be in thermal shutdown.
LTC3240-3.3/LTC3240-2.5
JA
, of 80°C/W for the 2 × 2 DFN package. This can
0.75 ±0.05
2.00 ±0.10
(4 SIDES)
0.00 – 0.05
0.56 ± 0.05
(2 SIDES)
J
≤ 160°C but long term operation
J
≤ 125°C for continuous opera-
R = 0.115
BOTTOM VIEW—EXPOSED PAD
TYP
1.37 ±0.05
(2 SIDES)
3
4
6
1
0.50 BSC
0.38 ± 0.05
0.25 ± 0.05
J
PIN 1
CHAMFER OF
EXPOSED PAD
≥ 160°C,
11
(DC6) DFN 1103
3240fb