LM3207TL/NOPB National Semiconductor, LM3207TL/NOPB Datasheet - Page 18
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LM3207TL/NOPB
Manufacturer Part Number
LM3207TL/NOPB
Description
IC CONV DC/DC 650MA ADJ 9USMD
Manufacturer
National Semiconductor
Series
PowerWise®r
Type
Step-Down (Buck)r
Datasheet
1.LM3207TLNOPB.pdf
(24 pages)
Specifications of LM3207TL/NOPB
Internal Switch(s)
Yes
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
0.8 ~ 3.6 V
Current - Output
650mA
Frequency - Switching
2MHz
Voltage - Input
2.7 ~ 5.5 V
Operating Temperature
-30°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
9-MicroSMD
For Use With
LM3207TL-2.53EV - BOARD EVAL LM3207 WCDMA/CDMALM3207TLEV - BOARD EVALUATION LM3207TL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Other names
LM3207TLTR
www.national.com
to ramp up. When the current sense signal ramps past the
error amplifier signal, the PWM comparator turns off the PFET
switch and turns on the NFET synchronous rectifier, ending
the first part of the cycle. If an increase in load pulls the output
down, the error amplifier output increases, which allows the
inductor current to ramp higher before the comparator turns
off the PFET. This increases the average current sent to the
output and adjusts for the increase in the load. Before ap-
pearing at the PWM comparator, a slope compensation ramp
from the oscillator is subtracted from the error signal for sta-
bility of the current feedback loop. The minimum on time of
PFET in PWM mode is 50ns (typ.)
Shutdown Mode
Setting the EN digital pin low (<0.5V) places the LM3207 in a
0.01µA (typ.) Shutdown mode. During shutdown, the PFET
switch, NFET synchronous rectifier, reference voltage
source, control and bias circuitry of theLM3207 are turned off.
Setting EN high (>1.2V) enables normal operation.
EN should be set low to turn off the LM3207 during power-up
and under voltage conditions when the power supply is less
than the 2.7V minimum operating voltage. The LM3207 is de-
signed for compact portable applications, such as mobile
phones. In such applications, the system controller deter-
mines power supply sequencing and requirements for small
package size outweigh the additional size required for inclu-
sion of UVLO (Under Voltage Lock-Out) circuitry.
Internal Synchronous Rectification
While in PWM mode, the LM3207 uses an internal NFET as
a synchronous rectifier to reduce rectifier forward voltage
drop and associated power loss. Synchronous rectification
provides a significant improvement in efficiency whenever the
output voltage is relatively low compared to the voltage drop
across and ordinary rectifier diode.
The internal NFET synchronous rectifier is turned on during
the inductor current down slope in the second part of each
cycle. The synchronous rectifier is turned off prior to the next
cycle. The NFET is designed to conduct through its intrinsic
body diode during transient intervals before it turns on, elim-
inating the need for an external diode.
Current Limiting
A current limit feature allows the LM3207 to protect itself and
external components during overload conditions. In PWM
mode, a 1200mA (max.) cycle-by-cycle current limit is nor-
mally used. If an excessive load pulls the output voltage down
to approximately 0.375V, then the device switches to a timed
current limit mode. In timed current limit mode the internal
PFET switch is turned off after the current comparator trips
and the beginning of the next cycle is inhibited for 3.5us to
force the instantaneous inductor current to ramp down to a
safe value. The synchronous rectifier is off in timed current
limit mode. Timed current limit prevents the loss of current
control evident in some products when the output voltage is
pulled low in serious overload conditions.
Dynamically Adjustable Output
Voltage
The LM3207 features dynamically adjustable output voltage
to eliminate the need for external feedback resistors. The out-
put can be set from 0.8V(typ.) to 3.6V(typ.) by changing the
voltage on the analog V
applications where peak power is needed only when the
CON
pin. This feature is useful in PA
18
handset is far away from the base station or when data is
being transmitted. In other instances the transmitting power
can be reduced. Hence the supply voltage to the PA can be
reduced, promoting longer battery life. See Setting the Output
Voltage in the Application Information section for further de-
tails.
Thermal Overload Protection
The LM3207 has a thermal overload protection function that
operates to protect itself from short-term misuse and overload
conditions. When the junction temperature exceeds 150°C,
the device inhibits operation. The PFET and NFET are turned
off in PWM mode. The LDO is turned off as well. When the
temperature drops below 130°C, normal operation resumes.
Prolonged operation in thermal overload conditions may dam-
age the device and is considered bad practice.
LDO Operation
An LDO is used to provide a regulated Vref supply to a RF PA
with a fixed voltage. The LDO can be enabled only after the
PWM is running. The LDO will automatically be disabled
whenever the EN or EN
are active charge and discharge circuits to quickly move a
100nF capacitor to meet the 3us timing requirements, or an
220nF capacitor to meet the 5us timing requirements. The
charging and discharging currents are controlled to minimize
supply disturbances. The LM3207 was designed specifically
to work with a 100nF or a 220nF ceramic capacitor and no
bypass capacitor. See Ordering Information table on page 2
for Voltage Options.
Application Information
SETTING THE DC-DC CONVERTER OUTPUT VOLTAGE
The LM3207 features a pin-controlled variable output voltage
to eliminate the need for external feedback resistors. It can
be programmed for an output voltage from 0.8V (typ.) to 3.6V
(typ.) by setting the voltage on the V
formula:
When V
will follow proportionally by 2.5 times of V
If V
may occur because of insufficient slope compensation. If
V
voltage may not be regulated due to the required on-time be-
ing less than the minimum on-time (50ns). The output voltage
can go lower than 0.8V providing a limited V
Refer to datasheet curve (V
for details. This curve is for a typical part and there could have
part-to-part variation for output voltages less than 0.8V over
the limited V
LDO CAPACITOR SELECTION
The output capacitor should be connected between the LDO
output and a good ground connection. This capacitor must be
selected within specified capacitance range and have suffi-
ciently low ESR. The ESR of the capacitor is generally a major
factor in LDO stability. Refer to manufacturer ESR curves for
more detail. Table 1 suggests acceptable capacitors and their
suppliers.
CON
CON
voltage is less than 0.32V (V
is over 1.44V (V
CON
is between 0.32V and 1.44V, the output voltage
IN
range.
V
OUT
OUT
LDO
= 2.5 x V
= 3.6V), sub-harmonic oscillation
is disabled. Included in the LDO
CON
Voltage vs Output Voltage)
CON
CON
OUT
pin, as in the following
= 0.8V), the output
CON
IN
.
range is used.