ISL8560IRZ Intersil, ISL8560IRZ Datasheet - Page 14
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ISL8560IRZ
Manufacturer Part Number
ISL8560IRZ
Description
IC REG 2A DC/DC STEP-DN 20-QFN
Manufacturer
Intersil
Type
Step-Down (Buck)r
Datasheet
1.ISL8560IRZ.pdf
(17 pages)
Specifications of ISL8560IRZ
Internal Switch(s)
Yes
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
1.21 ~ 55 V
Current - Output
2A
Frequency - Switching
100kHz ~ 600kHz
Voltage - Input
9 ~ 60 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Power - Output
3W
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ISL8560IRZ
Manufacturer:
Intersil
Quantity:
48
Company:
Part Number:
ISL8560IRZ
Manufacturer:
Intersil
Quantity:
135
operation, select bulk capacitors with voltage and current
ratings above the maximum input voltage and largest RMS
current required by the circuit. Their voltage rating should be
at least 1.25 times greater than the maximum input voltage,
while a voltage rating of 1.5 times is a conservative
guideline. For most cases, the RMS current rating
requirement for the input capacitor of a buck regulator is
approximately 1/2 the DC load current.
The maximum RMS current through the input capacitors
may be closely approximated through Equation 10:
For a through hole design, several electrolytic capacitors
may be needed. For surface mount designs, solid tantalum
capacitors can be used, but caution must be exercised with
regard to the capacitor surge current rating. These
capacitors must be capable of handling the surge-current at
power-up. Some capacitor series available from reputable
manufacturers are surge current tested.
Feedback Compensation
Figure 30 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(V
amplifier output (V
triangular wave to provide a pulse-width modulated (PWM)
wave with an amplitude of V
wave is smoothed by the output filter (L
The modulator transfer function is the small-signal transfer
function of V
Gain and the output filter (L
break frequency at f
the modulator is simply the input voltage (V
peak-to-peak oscillator voltage ΔV
incorporates a feed forward loop that accounts for changes
in the input voltage. This maintains a constant modulator
gain.
Modulator Break Frequency Equations
The compensation network consists of the transconductance
amplifier (internal to the ISL8560) and the impedance
networks Z
network is to provide a closed loop transfer function with the
highest 0dB crossing frequency (f
margin. Phase margin is the difference between the closed
loop phase at f
section relate the compensation network’s poles, zeros and
gain to the components (R
f LC
V
------------- -
OUT
V
OUT
IN
=
) is regulated to the Reference voltage level. The error
------------------------------------------ -
2π x
×
⎛
⎜
⎝
I
OUT
IN
OUT
L O x C O
1
MAX
and Z
0dB
/V
2
E/A
×
E/A
and 180°. The equations in the following
FB
LC
⎛
⎝
1
) is compared with the oscillator (OSC)
. The goal of the compensation
. This function is dominated by a DC
–
and a zero at f
V
------------- -
V
OUT
2
IN
, R
O
IN
14
⎞
⎠
and C
f ESR
3
+
at the LX node. The PWM
, R
----- -
12
1
0dB
OSC
4
=
×
, R
O
⎛
⎜
⎝
), with a double pole
------------------------------------------- -
2π x ESR x C O
) and adequate phase
ESR
V
---------------------------- -
6
L
. The ISL8560
IN
O
, C
×
–
and C
f
. The DC Gain of
10
OSC
V
IN
1
OUT
) divided by the
, C
O
6
×
, and C
).
V
------------- -
V
OUT
IN
(EQ. 10)
(EQ. 11)
⎞
⎟
⎠
2
7
⎞
⎟
⎠
) in
ISL8560
Figure 30. Use these guidelines for locating the poles and
zeros of the compensation network:
1. Pick Gain (R
2. Place 1
3. Place 2
4. Place 1
5. Place 2
6. Check Gain against Error transconductance’s Open-
7. Estimate Phase Margin - Repeat if Necessary.
ΔV
FIGURE 30. VOLTAGE-MODE BUCK CONVERTER
bandwidth.
Loop Gain.
OSC
OSC
ST
ND
ST
ND
COMPARATOR
COMPENSATION DESIGN AND OUTPUT
VOLTAGE SELECTION
Zero Below Filter’s Double Pole (~75% f
Pole at the ESR Zero.
Zero at Filter’s Double Pole.
Pole at Half the Switching Frequency.
ERROR
AMP
DETAILED COMPENSATION COMPONENTS
C
V
ISL8560
3
E/A
10
PWM
gm/(R
V
Z
+
-
OUT
-
+
FB
COMP
C
REFERENCE
2
6
REFERENCE
+R
=
g
m
-
+
1.20
3
) for desired converter
DRIVER
DRIVER
R
Z
4
IN
×
⎛
⎜
⎝
1
FB
+
Z
FB
R
------ -
R
LX
2
3
R
(PARASITIC)
V
⎞
⎟
⎠
D
3
C
IN
7
Z
R
IN
2
September 19, 2008
L
R
ESR
O
C
6
O
V
OUT
LC
FN9244.7
V
).
OUT