IR3843WMTR1PBF International Rectifier, IR3843WMTR1PBF Datasheet

IC REG SYNC BUCK 2A 15-QFN

IR3843WMTR1PBF

Manufacturer Part Number
IR3843WMTR1PBF
Description
IC REG SYNC BUCK 2A 15-QFN
Manufacturer
International Rectifier
Series
SupIRBuck™r
Type
Step-Down (Buck)r
Datasheet

Specifications of IR3843WMTR1PBF

Internal Switch(s)
Yes
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
0.7 ~ 14.4 V
Current - Output
2A
Frequency - Switching
225kHz ~ 1.65MHz
Voltage - Input
1.5 ~ 16 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
15-PowerVQFN
Power - Output
394mW
Primary Input Voltage
16V
No. Of Outputs
1
Output Voltage
14.4V
Output Current
2A
No. Of Pins
15
Operating Temperature Range
-40°C To +125°C
Output Voltage Adjustable Max, Vout
14.4V
Rohs Compliant
Yes
Part Status
Preferred
Package
PQFN / 5 x 6
Circuit
Single Output
Iout (a)
2
Switch Freq (khz)
250 - 1500
Input Range (v)
1.5 - 16
Output Range (v)
0.7 - 0.9*Vin
Ocp Otp Uvlo Pre-bias Soft Start And
PGOOD + EN + SEQ + OVD
Design Tool
Yes
Server Storage
Yes
Routers Switches
Yes
Base Station Telecom
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
IR3843WMTR1PBFTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IR3843WMTR1PBF
Manufacturer:
ABRACON
Quantity:
45 000
SupIRBuck
Features
Applications
Rev 10.0
Wide Input Voltage Range 1.5V to 16V
Wide Output Voltage Range 0.7V to 0.9*Vin
Continuous 2A Load Capability
Integrated Bootstrap-diode
High Bandwidth E/A for excellent transient
performance
Programmable Switching Frequency up to 1.5MHz
Programmable Over Current Protection
PGood output
Hiccup Current Limit
Precision Reference Voltage (0.7V, +/-1%)
Programmable Soft-Start
Enable Input with Voltage Monitoring Capability
Enhanced Pre-Bias Start-up
Seq input for Tracking applications
-40
Thermal Protection
Multiple current ratings in pin compatible footprint
5mm x 6mm Power QFN Package, 0.9 mm height
Lead-free, halogen-free and RoHS compliant
Server Applications
Storage Applications
Embedded Telecom Systems
Distributed Point of Load Power Architectures
o
C to 125
INTEGRATED 2A SYNCHRONOUS BUCK REGULATOR
1.5V <Vin<16V
PGood
4.5V <Vcc<5.5V
o
C operating junction temperature
TM
Seq
Vcc
Rt
SS/ SD
PGood
Fig. 1. Typical application diagram
Enable
Gnd
Vin
PGnd
Description
The IR3843W SupIRBuck
fully integrated and highly efficient DC/DC
synchronous Buck regulator. The MOSFETs co-
packaged with the on-chip PWM controller make
IR3843W a space-efficient solution, providing
accurate power delivery for low output voltage
applications.
IR3843W is a versatile regulator which offers
programmability of start up time, switching
frequency and current limit while operating in
wide input and output voltage range.
The switching frequency is programmable from
250kHz to 1.5MHz for an optimum solution.
It also features important protection functions,
such as Pre-Bias startup, hiccup current limit and
thermal shutdown to give required system level
security in the event of fault conditions.
OCSet
Comp
Boot
SW
Fb
Netcom Applications
Computing Peripheral Voltage Regulators
General DC-DC Converters
HIGHLY EFFICIENT
IR3843WMPbF
TM
is an easy-to-use,
PD-97507
Vo
1

Related parts for IR3843WMTR1PBF

IR3843WMTR1PBF Summary of contents

Page 1

SupIRBuck TM INTEGRATED 2A SYNCHRONOUS BUCK REGULATOR Features • Wide Input Voltage Range 1.5V to 16V • Wide Output Voltage Range 0.7V to 0.9*Vin • Continuous 2A Load Capability • Integrated Bootstrap-diode • High Bandwidth E/A for excellent transient performance ...

Page 2

... PACKAGE INFORMATION 5mm x 6mm POWER QFN V IN Boot Enable ORDERING INFORMATION PACKAGE DESIGNATOR M M Rev 10 Gnd Seq FB COMP Gnd Rt SS OCSet PACKAGE PIN COUNT DESCRIPTION IR3843WMTRPbF 15 IR3843WMTR1PbF 15 PD-97507 IR3843WMPbF and -40 C PGnd θ θ PCB - V CC PGood PARTS PER REEL 4000 750 2 ...

Page 3

Block Diagram Fig. 2. Simplified block diagram of the IR3843W Rev 10.0 PD-97507 IR3843WMPbF 3 ...

Page 4

Pin Description Pin Name Sequence pin. Use two external resistors to set Simultaneous Power up 1 Seq sequencing. If this pin is not used connect to Vcc. Inverting input to the error amplifier. This pin is connected directly to the ...

Page 5

Recommended Operating Conditions Symbol Definition V Input Voltage in V Supply Voltage cc Boot to SW Supply Voltage V Output Voltage o I Output Current o Fs Switching Frequency T Junction Temperature j Electrical Specifications Unless otherwise specified, these specification ...

Page 6

Electrical Specifications (continued) Unless otherwise specified, these specifications apply over 4.5V< V Typical values are specified Parameter Symbol Oscillator Rt Voltage Frequency F S Ramp Amplitude Vramp Ramp Offset Ramp (os) Min Pulse Width Dmin(ctrl) ...

Page 7

Electrical Specifications (continued) Unless otherwise specified, these specification apply over 4.5V< V Typical values are specified Parameter SYM Thermal Shutdown Thermal Shutdown Hysteresis Power Good Power Good upper VPG(upper) Threshold Upper Threshold VPG(upper)_Dly Delay Power ...

Page 8

TYPICAL OPERATING CHARACTERISTICS (-40 Icc(Standby) 290 270 250 230 210 190 170 150 -40 - Temp[ C] FREQUENCY 550 540 530 520 510 500 490 480 470 460 450 -40 - ...

Page 9

Rdson of MOSFETs Over Temperature at Vcc=5V Note: Ctrl-FET and Sync-FET are identical -40 -20 0 Rev 10 Temperature [°C] Ctrl-FET/Sync-FET PD-97507 IR3843WMPbF 100 120 140 9 ...

Page 10

Typical Efficiency and Power Loss Curves Vin=12V, Vcc=5V, Io=0.2A-2A, F The table below shows the inductors used for each of the output voltages in the efficiency measurement. Vout (V) Vout (V) 0.9 0 1.1 1.1 1.2 1.2 1.5 ...

Page 11

Typical Efficiency and Power Loss Curves Vin=5V, Vcc=5V, Io=0.2A-2A, F The table below shows the inductors used for each of the output voltages in the efficiency measurement. Vout (V) Vout (V) 0.7 0.7 0.75 0.75 0.9 0 1.1 ...

Page 12

Circuit Description THEORY OF OPERATION Introduction The IR3843W uses a PWM voltage mode control scheme with external compensation to provide good noise immunity and maximum flexibility in selecting inductor values and capacitor types. The switching frequency is programmable from 250kHz ...

Page 13

Fig. 3c. Recommended startup sequence, Sequenced operation Pre-Bias Startup IR3843W is able to start up into pre-charged output, which prevents oscillation disturbances of the output voltage. The output starts in asynchronous fashion and keeps the synchronous MOSFET off until the ...

Page 14

Operating Frequency The switching frequency can be programmed between 250kHz – 1500kHz by connecting an external resistor from R pin to Gnd. Table 1 t tabulates the oscillator frequency versus R Table 1. Switching Frequency and I External Resistor (R ...

Page 15

Thermal Shutdown Temperature sensing is provided IR3843W. The trip threshold is typically set to o 140 C. When trip threshold is exceeded, thermal shutdown turns off both MOSFETs discharges the soft start capacitor. Automatic restart is initiated when the sensed ...

Page 16

TIMING DIAGRAM OF PGOOD FUNCTION Fig.9a IR3843W Non-Tracking Operation (Seq=Vcc) Fig.9b IR3843W Tracking Operation Rev 10.0 PD-97507 IR3843WMPbF 16 ...

Page 17

Minimum on time Considerations The minimum ON time is the shortest amount of time for which the Control FET may be reliably turned on, and this depends on the internal timing delays. For the IR3843W, the typical minimum on-time is ...

Page 18

Application Information Design Example: The following example is a typical application for IR3843W. The application circuit is shown on page 23 13.2V max 1 ≤ ...

Page 19

Vc across C6 remains approximately unchanged and the voltage at the Boot pin becomes ≅ + − .......... .......... .......... Boot Boot IR3843W PGnd Fig. ...

Page 20

Output Capacitor Selection The voltage ripple and transient requirements determine the output capacitors type and values. The criteria is normally based on the value of the Effective Series Resistance (ESR). However the actual capacitance value and the Equivalent Series Inductance ...

Page 21

V Z OUT E REF Gain(dB) H( Fig. 14. Type II compensation network and its asymptotic gain plot The transfer function ( given by: e ...

Page 22

V OUT E REF Gain(dB) H( Fig.15. Type III Compensation network and its asymptotic gain plot The ...

Page 23

Detailed calculation of compensation TypeIII Θ Desired Phase Margin 70 − Θ 1 sin = = F F 14.11 kHz Θ 1 sin + Θ 1 sin = = F F 453.7 kHz P ...

Page 24

... Rohm 50V, 0603, NP0, 5% Murata 0603, 50V, X7R, 10% Panasonic - ECG 0603,1/10W,1% Rohm 0603,1/10W,1% Rohm 0603,1/10W,1% Panasonic 0603, 50V, X7R, 10% Panasonic - ECG SupIRBuck PQFN 5x6mm International Rectifier PD-97507 IR3843WMPbF Part Number EEV-FK1E331P C3216X5R1E106M ECJ-2FB1C105K IHLP2525EZ-01 3.3uH ECJ-2FB0J226M MCR03EZPFX4992 MCR03EZPFX7501 MCR03EZPFX2372 MCR03EZPFX1541 MCR03EZPFX1002 ...

Page 25

TYPICAL OPERATING WAVEFORMS Vin=12.0V, Vcc=5V, Vo=1.8V, Io=0-2A, Room Temperature, No Air Flow Fig. 17. Start Load :Enable Fig. 19. Start ...

Page 26

TYPICAL OPERATING WAVEFORMS Vin=12V, Vcc=5V, Vo=1.8V, Io=1A-2A, Room Temperature, No Air Flow Fig. 23. Transient Response step Rev 10.0 IR3843WMPbF 2.5A/μ PD-97507 26 ...

Page 27

TYPICAL OPERATING WAVEFORMS Vin=12V, Vcc=5V, Vo=1.8V, Io=2A, Room Temperature, No Air Flow Fig. 24. Bode Plot at 2A load shows a bandwidth of 86kHz and phase margin of 56 Rev 10.0 IR3843WMPbF degrees PD-97507 27 ...

Page 28

Simultaneous Tracking at Power Up and Power Down Vin=12V, Vo=1.8V, Io=2A, Room Temperature, No Air Flow 3.3V R 4.99K s1 3.16K R s2 Fig. 25: Simultaneous Tracking a 3.3V input at power-up and shut-down Rev 10.0 V OUT IR3843W IR3624 ...

Page 29

Layout Considerations The layout is very important when designing high frequency switching converters. Layout will affect noise pickup and can cause a good design to perform with less than expected results. Make all the connections for components in the top ...

Page 30

Feedback trace should be kept away form noise sources Fig. 26b. IRDC3843W demoboard layout considerations – Bottom Layer Analog Ground plane Single point connection between AGND & PGND, should be close to the SupIRBuck, kept away from noise sources. Fig. ...

Page 31

PCB Metal and Components Placement Lead lands (the 11 IC pins) width should be equal to nominal part lead width. The minimum lead to lead spacing should be ≥ 0.2mm to minimize shorting. Lead land length should be equal to ...

Page 32

Solder Resist It is recommended that the lead lands are Non Solder Mask Defined (NSMD). The solder resist should be pulled away from the metal lead lands by a minimum of 0.025mm to ensure NSMD pads. The land pad should ...

Page 33

Stencil Design • The Stencil apertures for the lead lands should be approximately 80% of the area of the lead lads. Reducing the amount of solder deposited will minimize the occurrences of lead shorts. If too much solder is deposited ...

Page 34

IR WORLD HEADQUARTERS: This product has been designed and qualified for the Consumer market Rev 10.0 IR3843WMPbF BOTTOM VIEW 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 Visit us at www.irf.com for sales contact information Data and ...

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