NCP5380MNR2G ON Semiconductor, NCP5380MNR2G Datasheet

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NCP5380MNR2G

Manufacturer Part Number
NCP5380MNR2G
Description
IC CTLR SYNC BUCK IMVP6.5 32-QFN
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP5380MNR2G

Applications
Controller, Intel VR11
Voltage - Input
5.5V
Number Of Outputs
1
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-TFQFN Exposed Pad
Output Voltage
1.08 V to 1.35 V
Output Current
- 5 uA
Input Voltage
0.3 V
Supply Current
4.2 mA
Switching Frequency
390 KHz
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Dc
10+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Output
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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NCP5380
7-Bit, Programmable,
Single-Phase, Synchronous
Buck Switching Regulator
Controller
General Description
switching regulator controller. With its integrated drivers, the
NCP5380 is optimized for converting the silver box voltage to the
supply voltage required by high performance Intel chipsets. An
internal 7−bit DAC is used to read a VID code directly from the
chipset.
programmable switching frequency that can be optimized for
efficiency depending on the output current requirement. In addition,
the NCP5380 includes a programmable load line slope function to
adjust the output voltage as a function of the load current so that the
core voltage is always optimally positioned for a load transient. The
NCP5380 also provides accurate and reliable current overload
protection and a delayed power−good output. The IC supports
on−the−fly output voltage changes requested by the chipset.
temperature range of 0°C to 85°C and is available in a 32−lead QFN.
Features
Applications
© Semiconductor Components Industries, LLC, 2009
May, 2009 − Rev. 0
The NCP5380 is a highly efficient, single−phase, synchronous buck
The NCP5380 uses a multimode architecture. It provides
The NCP5380 is specified over the extended commercial
Regulator Specifications
Temperature
Load Operation
Additional Design Flexibility
On−the−fly Transients
Single−chip Solution
Fully Compatible with the Intel VR11 CPU Chipset Voltage
Integrated MOSFET Drivers
±8 mV Worst−case Differentially Sensed Core Voltage Error over
Automatic Power−saving Modes Maximize Efficiency During Light
Soft Transient Control Reduces Inrush Current and Audio Noise
Independent Current Limit and Load Line Setting Inputs for
Built−in Power−good Masking Supports Voltage Identification (VID)
7−bit, Digitally Programmable DAC
Short−circuit Protection with Programmable Latch−off Delay
Current Monitor Output Signal
32−lead QFN
This is a Pb−Free Device
Desktop Power Supplies for Next−generation Intel Chipsets
1
NCP5380MNR2G
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
PWRGD
CASE 488AM
(Note: Microdot may be in either location)
QFN32, 5x5
MN SUFFIX
FBRTN
Device
COMP
IMON
GND
ILIM
1
N/C
NCP5380 = Specific Device Code
A
WL
YY
WW
G
ORDERING INFORMATION
FB
32
PIN CONFIGURATION
http://onsemi.com
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb Free Package
(Pb−Free)
Package
QFN−32
(Top View)
NCP5380
Publication Order Number:
1
AWLYYWWG
5000 / Tape & Reel
MARKING
DIAGRAM
NCP5380
Shipping
G
NCP5380/D
VCC
BST
DRVH
SW
PVCC
DRVL
PGND
GND

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NCP5380MNR2G Summary of contents

Page 1

... NCP5380 FBRTN FB (Top View) COMP GND ILIM ORDERING INFORMATION Device Package NCP5380MNR2G QFN−32 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 1 Publication Order Number: MARKING ...

Page 2

EN 32 IREF 10 31 RPM VID1 VID2 12 29 RAMP VID3 13 28 LLINE VID4 14 VID5 27 CSREF 26 15 CSFB VID6 16 25 CSCOMP VID7 Figure 1. Application Schematic http://onsemi.com 2 ...

Page 3

GND COMP FB REF LLINE DAC + 200 mV CSREF DAC − 300 mV PWRGD Open PWRGD Drain N/C Precision FBRTN Reference ELECTRICAL CHARACTERISTICS Current entering a pin (sunk by the device) has a positive sign. Parameter VOLTAGE CONTROL VOLTAGE ...

Page 4

ELECTRICAL CHARACTERISTICS Current entering a pin (sunk by the device) has a positive sign. Parameter VOLTAGE CONTROL VOLTAGE ERROR AMPLIFIER (VEAMP) COMP Slew Rate Gain Bandwidth (Note 2) VID DAC VOLTAGE REFERENCE VDAC Voltage Range (Note 2) VDAC Accuracy VDAC ...

Page 5

ELECTRICAL CHARACTERISTICS Current entering a pin (sunk by the device) has a positive sign. Parameter CURRENT SENSE AMPLIFIER Gain Bandwidth Product (Note 2) Slew Rate (Note 2) Input Common−Mode Range (Note 2) Output Voltage Range Output Current SWITCH AMPLIFIER Common−Mode ...

Page 6

ELECTRICAL CHARACTERISTICS Current entering a pin (sunk by the device) has a positive sign. Parameter POWER GOOD PWRGD delay Time CURRENT MONITOR IMON Output Current IMON Output Current IMON Clamp HIGH−SIDE MOSFET DRIVER Output Resistance, Sourcing Current Output Resistance, Sinking ...

Page 7

Timing Diagram Timing is referenced to the 90% and 10% points, unless otherwise noted. IN tpdl DRVL DRVL tpdh DRVH (WITH RESPECT TO SW) SW ABSOLUTE MAXIMUM RATING VCC FBRTN, PGND BST BST to SW DRVH, SW DRVH to SW ...

Page 8

Pin Function Descriptions Pin No. Mnemonic 1 PWRGD Power−Good Output. Open−drain output. A low logic state means that the output voltage is outside of the VID DAC defined range. 2 IMON Current Monitor Output. This pin sources current proportional to ...

Page 9

20°C to 100°C, unless otherwise noted. VID A Output Voltage Switch Node Low Side Gate Drive Figure 4. DCM Waveforms Load Current Output Voltage Switch Node Load Current Figure 6. Load Transient, ...

Page 10

The NCP5380 is a ramp−pulse−modulated (RPM) controller for synchronous buck power supply. The internal 7−bit VID DAC conforms to the Intel VR11 specifications. The NCP5380 is a stable, high performance architecture that includes • High speed response at the lowest ...

Page 11

RAMP Clock Oscillator + 0 Ramp + - COMP Master Clock Frequency in PWM Mode When ...

Page 12

DCR sensing, signals from the switch node side of the output inductors) are connected with a resistor. The feedback resistor between the CSCOMP and CSFB pins sets the gain of the current sense amplifier, ...

Page 13

Current Limit, Short−Circuit, and Latch−Off Protection The NCP5380 has an adjustable current limit set by the R resistor. The NCP5380 compares a programmable CLIM current−limit set point to the voltage from the output of the current−sense amplifier. The level of ...

Page 14

Q1 DRVH SWITCH L NODE INPUT Q2 + − VOLTAGE DRVL Figure 16. Buck Topology − OFF Figure 17. Buck Topology Inductor Current During t and OFF L + − ON Figure 18. Buck ...

Page 15

Reverse Voltage Protection Very large reverse current in inductors can cause negative output voltage, which is harmful to the chipset and other output components. The NCP5380 provides a reverse voltage protection (RVP) function without additional system cost. The output voltage ...

Page 16

VID Codes (FBRTN = 112.5 mV) VID7 VID6 VID5 ...

Page 17

VID Codes (FBRTN = 112.5 mV) VID7 VID6 VID5 ...

Page 18

The design parameters for a typical VR11−compliant CPU core VR application are as follows: • Maximum Input Voltage (V INMAX • Minimum Input Voltage ( INMIN • Output Voltage by VID Setting (V VID • Maximum ...

Page 19

RPM operation. However, the V ripple specification of VR11 sets a CC limitation for the lowest switching frequency. Therefore, depending on the inductor and output capacitors, the switching frequency in RPM can be equal to, ...

Page 20

Where R is the DCR of the output inductors. SENSE Either RCS or RPH can be chosen for added flexibility. Due to the current drive ability of the CSCOMP pin, the RCS resistance should be greater than 100 kW. For ...

Page 21

Additional ceramic capacitors can be placed along the outer edge of the socket. A combined ceramic capacitor value recommended and is usually composed of ...

Page 22

R MOSFET should be less than 13 room temperature high temperature. Another important factor for the synchronous MOSFET is the input capacitance and feedback capacitance. The ratio of ...

Page 23

A resistor from IMON to FBRTN sets the MON gain of the output current monitor placed in parallel with R to filter the inductor current ripple and MON high frequency load transients. Since ...

Page 24

VID Where: R’ is the ...

Page 25

Set the AC Load Line 1. Remove the dc load from the circuit and connect a dynamic load. 2. Connect the scope to the output voltage and set coupling mode with a time scale of 100 ms/div. ...

Page 26

LAYOUT AND COMPONENT PLACEMENT The following guidelines are recommended for optimal performance of a switching regulator system. General Recommendations 1. For best results, use a PCB of four or more layers. This should provide the needed versatility ...

Page 27

... X 0. 0.28 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81− ...

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