ISL6556ACB-T Intersil, ISL6556ACB-T Datasheet - Page 18
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ISL6556ACB-T
Manufacturer Part Number
ISL6556ACB-T
Description
IC CTRLR MULTIPHASE VRM10 28SOIC
Manufacturer
Intersil
Datasheet
1.ISL6556ACBZ.pdf
(25 pages)
Specifications of ISL6556ACB-T
Applications
Controller, Intel VR10X
Voltage - Input
3 ~ 12 V
Number Of Outputs
4
Voltage - Output
0.84 ~ 1.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL6556ACB-T
Manufacturer:
INTERSIL
Quantity:
20 000
require heat sinks and forced air to cool the MOSFETs,
inductors and heat-dissipating surfaces.
MOSFETs
The choice of MOSFETs depends on the current each
MOSFET will be required to conduct; the switching frequency;
the capability of the MOSFETs to dissipate heat; and the
availability and nature of heat sinking and air flow.
LOWER MOSFET POWER CALCULATION
The calculation for heat dissipated in the lower MOSFET is
simple, since virtually all of the heat loss in the lower
MOSFET is due to current conducted through the channel
resistance (r
continuous output current; I
current (see Equation 1); d is the duty cycle (V
L is the per-channel inductance.
An additional term can be added to the lower-MOSFET loss
equation to account for additional loss accrued during the
dead time when inductor current is flowing through the
lower-MOSFET body diode. This term is dependent on the
diode forward voltage at I
frequency, f
the beginning and the end of the lower-MOSFET conduction
interval respectively.
Thus the total maximum power dissipated in each lower
MOSFET is approximated by the summation of P
P
UPPER MOSFET POWER CALCULATION
In addition to r
MOSFET losses are due to currents conducted across the
input voltage (V
higher portion of the upper-MOSFET losses are dependent
on switching frequency, the power calculation is more
complex. Upper MOSFET losses can be divided into
separate components involving the upper-MOSFET
switching times; the lower-MOSFET body-diode reverse-
recovery charge, Q
conduction loss.
When the upper MOSFET turns off, the lower MOSFET does
not conduct any portion of the inductor current until the
voltage at the phase node falls below ground. Once the
lower MOSFET begins conducting, the current in the upper
MOSFET falls to zero as the current in the lower MOSFET
ramps up to assume the full inductor current. In Equation 13,
P
P
LOW,2
LOW 1
LOW 2
,
,
.
=
=
r
V
DS ON
S
DS(ON)
D ON
; and the length of dead times, t
(
(
DS(ON)
IN
)
) during switching. Since a substantially
)
f
S
rr
). In Equation 11, I
⎛
⎜
⎝
; and the upper MOSFET r
I
----- -
N
M
⎛
⎝
losses, a large portion of the upper-
I
----- -
⎞
⎟
⎠
N
M
2
(
+
M
1 d
I
-------- -
, V
PP
–
PP
2
18
D(ON)
⎞ t
⎠
)
is the peak-to-peak inductor
+
d1
I
-----------------------------
L PP
,
+
2
; the switching
12
⎛
⎝
M
I
----- - -
(
N
M
1-d
is the maximum
I
-------- -
PP
)
2
d1
⎞ t
⎠
OUT
d2
DS(ON)
and t
LOW,1
/V
IN
d2
(EQ. 11)
(EQ. 12)
); and
, at
and
ISL6556A
the required time for this commutation is t
approximated associated power loss is P
At turn on, the upper MOSFET begins to conduct and this
transition occurs over a time t
approximate power loss is P
A third component involves the lower MOSFET’s reverse-
recovery charge, Q
commutated to the upper MOSFET before the lower-
MOSFET’s body diode can draw all of Q
through the upper MOSFET across VIN. The power
dissipated as a result is P
Finally, the resistive part of the upper MOSFETs is given in
Equation 16 as P
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
from Equations 13, 14, 15 and 16. Since the power
equations depend on MOSFET parameters, choosing the
correct MOSFETs can be an iterative process involving
repetitive solutions to the loss equations for different
MOSFETs and different switching frequencies.
Current Sensing
The ISEN pins are denoted ISEN1, ISEN2, ISEN3 and
ISEN4. The resistors connected between these pins and the
respective phase nodes determine the gains in the load-line
regulation loop and the channel-current balance loop as well
as setting the overcurrent trip point. Select values for these
resistors based on the room temperature r
lower MOSFETs; the full-load operating current, I
number of phases, N using Equation 17 (see also Figure 3).
In certain circumstances, it may be necessary to adjust the
value of one or more ISEN resistor. When the components of
one or more channels are inhibited from effectively dissipating
their heat so that the affected channels run hotter than
desired, choose new, smaller values of R
phases (see the section entitled Channel-Current Balance).
Choose R
temperature rise in order to cause proportionally less current
to flow in the hotter phase.
In Equation 18, make sure that ΔT
temperature rise above the ambient temperature, and ΔT
P
P
P
P
R
UP 1 ,
UP 2 ,
UP 3 ,
UP 4 ,
ISEN
≈
≈
≈
=
=
V
r
V
DS ON
V
IN
IN
---------------------- -
70 10
r
ISEN,2
IN
DS ON
(
⎛
⎝
⎛
⎜
⎝
×
I
----- -
Q
N
I
----- -
M
N
(
M
rr
)
+
–
–
f
S
⎛
⎜
⎝
6
I
-------- -
)
I
-------- -
in proportion to the desired decrease in
UP,4
PP
PP
I
----- -
2
2
N
M
I
------- -
FL
N
rr
⎞
⎟
⎠
⎞ t
⎠
⎞ t
⎟
⎠
. Since the inductor current has fully
2
⎛
⎜
⎝
⎛
⎜
⎝
.
d
----
----
2
2
2
1
+
⎞
⎟
⎠
⎞
⎟
⎠
I
--------- -
f
f
UP,3
PP
12
S
S
2
UP,2
2
and is approximately
. In Equation 14, the
.
2
is the desired
ISEN
rr
UP,1
1
, it is conducted
DS(ON)
and the
.
for the affected
FL
of the
; and the
(EQ. 13)
(EQ. 14)
(EQ. 15)
(EQ. 16)
(EQ. 17)
1
is