MAX8744ETJ+ Maxim Integrated Products, MAX8744ETJ+ Datasheet - Page 33

• Manufacturer Part Number: MAX8744ETJ+
• Description: IC CNTRLR PWR SUP QUAD 32TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX8744ETJ+

• Applications: Controller, Notebook Computers
• Voltage - Input: 6 ~ 26 V
• Number Of Outputs: 4
• Voltage - Output: 3.3V, 5V, 1 ~ 26 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFN Exposed Pad
• Duty Cycle (max): 99 %
• Output Voltage: 3.315 V, 5.015 V, 2 V to 5.5 V
• Mounting Style: SMD/SMT
• Switching Frequency: 200 KHz, 300 KHz, 500 KHz
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Synchronous Pin: No
• Topology: Boost, Flyback, Forward
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3) Next, calculate the pole set by the transistor’s input
4) Next, calculate the pole set by the linear regulator’s
5) Next, calculate the zero caused by the output
6) To ensure stability, choose C
capacitance, the transistor’s input resistance, and the
base-to-emitter pullup resistor. Since the transistor’s
input resistance (h
than the base-to-emitter pullup resistance, the pole
can be determined from the simplified equation:
where g
sistor, and f
meters can be found in the transistor’s data sheet.
Therefore, the equation can be further reduced to:
feedback resistance and the capacitance between
FBA and ground (approximately 5pF including
stray capacitance):
capacitor’s ESR:
where R
C
that the crossover occurs well before the poles and
zero calculated in steps 2 through 5. The poles in
steps 3 and 4 generally occur at several MHz, and
using ceramic output capacitors ensures the ESR
zero occurs at several MHz as well. Placing the
crossover frequency below 500kHz is typically suf-
ficient to avoid the amplifier delay pole and gener-
ally works well, unless unusual component
selection or extra capacitance moves the other
poles or zero below 1MHz.
A capacitor connected between the linear regula-
tor’s output and the feedback node can improve
the transient response and reduce the noise cou-
pled into the feedback loop.
If a low-dropout solution is required, an external p-
channel MOSFET pass transistor could be used.
However, a pMOS-based linear regulator requires
higher output capacitance to stabilize the loop. The
OUTA
Supply Controllers for Notebook Computers
.
m
ESR
High-Efficiency, Quad-Output, Main Power-
f
f
POLE FBA
ZERO ESR
is the transconductance of the pass tran-
T
f
POLE CIN
is the equivalent series resistance of
is the transition frequency. Both para-
______________________________________________________________________________________
(
f
(
POLE CIN
(
C
FE
)
)
IN
=
(
=
/g
)
2
=
2π
m
≈
π
2
) is typically much greater
C
)
g
2
C
π
m
≈
FBA
π
f
OUTA ESR
T
C R
h
OUTA
IN IN
f
1
FE
T
1
1
(
R
5
R
||
R
large enough so
6
)
The minimum input operating voltage (dropout voltage) is
restricted by the maximum duty-cycle specification (see
the Electrical Characteristics table). For the best dropout
performance, use the slowest switching frequency set-
ting (200kHz, FSEL = GND). However, keep in mind that
the transient performance gets worse as the step-down
regulators approach the dropout voltage, so bulk output
capacitance must be added (see the voltage sag and
soar equations in the Transient Response section of the
SMPS Design Procedure section). The absolute point of
dropout occurs when the inductor current ramps down
during the off-time (ΔI
during the on-time (ΔI
ating voltage defined by the following equation:
where V
the charge and discharge paths, respectively. A rea-
sonable minimum value for h is 1.5, while the absolute
minimum input voltage is calculated with h = 1.
The MAX8744/MAX8745 controllers include a minimum
on-time specification, which determines the maximum
input operating voltage that maintains the selected
switching frequency (see the Electrical Characteristics
table). Operation above this maximum input voltage
results in pulse-skipping operation, regardless of the
operating mode selected by SKIP. At the beginning of
each cycle, if the output voltage is still above the feed-
back threshold voltage, the controller does not trigger
an on-time pulse, effectively skipping a cycle. This
allows the controller to maintain regulation above the
maximum input voltage, but forces the controller to
effectively operate with a lower switching frequency.
This results in an input threshold voltage at which the
controller begins to skip pulses (V
where f
V
IN MIN
high gate capacitance of the p-channel MOSFET
lowers the f
large output capacitance must be used to reduce
the unity-gain bandwidth and ensure that the pole
is well above the unity-gain crossover frequency.
(
OSC
CHG
)
=
V
is the switching frequency selected by FSEL.
OUT
V
and V
IN SKIP
(
Applications Information
POLE(CIN)
+
DIS
V
)
CHG
UP
=
V
DOWN
are the parasitic voltage drops in
). This results in a minimum oper-
OUT
+
and can cause instability. A
h
⎛
⎜
⎝
⎛
⎜
⎝
) as much as it ramps up
D
f
OSC ON MIN
Maximum Input Voltage
Minimum Input Voltage
MAX
1
Duty-Cycle Limits
IN(SKIP)
t
1
−
(
1
⎞
⎟
⎠
(
V
):
)
OUT
⎞
⎟
⎠
+
V
DIS
33
)