MAX8550AETI+ Maxim Integrated Products, MAX8550AETI+ Datasheet - Page 23

IC PWR SUP DDR INTEG 28TQFN

MAX8550AETI+

Manufacturer Part Number
MAX8550AETI+
Description
IC PWR SUP DDR INTEG 28TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX8550AETI+

Applications
Controller, DDR
Voltage - Input
2 ~ 28 V
Number Of Outputs
2
Voltage - Output
1.8V, 2.5V, 0.7 ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-TQFN Exposed Pad
Output Voltage
0.7 V to 5.5 V, 1.8 V, 2.5 V
Output Current
1.5 A
Input Voltage
2 V to 28 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
used for setting the adjustable current limit as shown in
Figure 7.
The following is a procedure for calculating the value of
R4, R5, and R6:
1) Calculate the voltage, V
2) Pick a percentage of foldback, PFB, from 15%
3) Calculate the voltage, V
4) The value for R4 can be calculated as:
5) The parallel combination of R5 and R6, denoted
Figure 7. Foldback Current Limit
when the output voltage is at nominal:
to 40%.
shorted (0V):
R56, is calculated as:
V
ILIM NOM
MAX8550A
(
V
ILIM V
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
)
=
(
R
R
______________________________________________________________________________________
0
4
56
10
GND
ILIM
REF
×
)
=
=
=
R
×
2
DS ON Q
V
P
10
I
FB
2
LOAD MAX
-
ILIM(0V)
ILIM(NOM)
(
V
10
μ
V
A
×
ILIM V
C
μ
)
REF
A
(
V
2
-
ILIM NOM
(
0
, when the output is
R
4
)
)
(
, required at ILIM
R4
R6
×
V
1
OUT
)
-
R5
LIR
2
6) Then R6 can be calculated as:
7) Then R5 is calculated as:
A low-current Schottky diode, such as the CMDSH-3
from Central Semiconductor, works well for most appli-
cations. Do not use large-power diodes, because high-
er junction capacitance can charge up the voltage at
BST to the LX voltage and this exceeds the absolute
maximum rating of 6V. The boost capacitor should be
0.1µF to 4.7µF, depending on the input and output volt-
ages, external components, and PC board layout. The
boost capacitance should be as large as possible to
prevent it from charging to excessive voltage, but small
enough to adequately charge during the minimum low-
side MOSFET conduction time, which happens at maxi-
mum operating duty cycle (this occurs at minimum
input voltage). In addition, ensure that the boost capac-
itor does not discharge to below the minimum gate-to-
source voltage required to keep the high-side MOSFET
fully enhanced for lowest on-resistance. This minimum
gate-to-source voltage (V
where V
high-side MOSFET, and C
value where C
Circuit (Figure 8).
R
6
=
DD
(
(
V
(
is 5V, Q
V
V
OUT
ILIM NOM
GS MIN
BOOST
(
(
-
(
V
R
V
ILIM NOM
)
Capacitor Selection (Buck)
G
5
OUT
is C7 in the Typical Applications
)
=
=
is the total gate charge of the
(
R
Boost-Supply Diode and
GS(MIN)
R
V
BOOST
6
6
×
V
DD
ILIM V
×
-
)
R
-
R
4
R
x
V
(
56
0
ILIM V
56
) is determined by:
×
is the boost-capacitor
C
)
R
)
BOOST
(
Q
0
5
×
G
6
)
R
)
)
56
×
)
R
4 -
23

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