EL5525IREZ-T7 Intersil, EL5525IREZ-T7 Datasheet - Page 10

IC VREF GEN 18CH TFTLCD 38HTSSOP

EL5525IREZ-T7

Manufacturer Part Number
EL5525IREZ-T7
Description
IC VREF GEN 18CH TFTLCD 38HTSSOP
Manufacturer
Intersil
Datasheet

Specifications of EL5525IREZ-T7

Applications
Converter, TFT, LCD
Voltage - Input
4.5 ~ 16.5 V
Number Of Outputs
18
Voltage - Output
0.5 ~ 14.95 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
38-TSSOP Exposed Pad, 38-eTSSOP, 38-HTSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
HTSSOP (Heat-Sink TSSOP) Family
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
SEE DETAIL “X”
E
C
EXPOSED
THERMAL PAD
SEATING
PLANE
0.25
N LEADS
E1
B
0.10 C
M
A
1
C A B
N
A2
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
e
TOP VIEW
A1
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
For information regarding Intersil Corporation and its products, see www.intersil.com
b
DETAIL X
D
SIDE VIEW
END VIEW
10
BOTTOM VIEW
L1
L
D1
(N/2)+1
0.10
(N/2)
0° - 8°
M
GAUGE
PLANE
0.05
C A B
2X
N/2 LEAD TIPS
PIN #1 I.D.
A
0.25
0.20 C
c
E2
B A
H
EL5525
MDP0048
HTSSOP (HEAT-SINK TSSOP) FAMILY
NOTES:
SYMBOL
1. Dimension “D” does not include mold flash, protrusions or gate
2. Dimension “E1” does not include interlead flash or protrusions.
3. Dimensions “D” and “E1” are measured at Datum Plane H.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
D1
A1
A2
E1
E2
L1
D
N
A
b
E
e
L
c
burrs. Mold flash, protrusions or gate burrs shall not exceed
0.15mm per side.
Interlead flash and protrusions shall not exceed 0.25mm per
side.
14 LD 20 LD 24 LD 28 LD 38 LD
0.075
1.20
0.90
0.25
0.15
5.00
6.40
4.40
0.65
0.60
1.00
3.2
3.0
14
0.075
1.20
0.90
0.25
0.15
6.50
6.40
4.40
0.65
0.60
1.00
4.2
3.0
20
MILLIMETERS
0.075
1.20
0.90
0.25
0.15
7.80
6.40
4.40
0.65
0.60
1.00
4.3
3.0
24
0.075
1.20
0.90
0.25
0.15
9.70
6.40
4.40
0.65
0.60
1.00
5.0
3.0
28
0.075
1.20
0.90
0.22
0.15
9.70
7.25
6.40
4.40
0.50
0.60
1.00
3.0
38
September 21, 2010
TOLERANCE
+0.15/-0.10
+0.05/-0.06
+0.05/-0.06
Reference
Reference
Reference
Reference
Rev. 3 2/07
±0.075
±0.10
±0.10
±0.15
Basic
Basic
Max
FN7393.2

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