EL5225IRZ-T7 Intersil, EL5225IRZ-T7 Datasheet - Page 9

• Manufacturer Part Number: EL5225IRZ-T7
• Description: IC VREF GEN 10CH TFT-LCD 24TSSOP
• Manufacturer: Intersil

Specifications of EL5225IRZ-T7

• Applications: Converter, TFT, LCD
• Voltage - Input: 5 ~ 16.5 V
• Number Of Outputs: 10
• Voltage - Output: 0.5 ~ 14.95 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

will repeat every 10-clock cycles for each channel. The time
takes to update the output depends on the timing at the V
and the state of the switches. It can take 1 to 10 clock cycles
to update each output.
For the sample and hold capacitor CH to maintain the
correct output voltage, the driving load shouldn’t be changed
at the rising edge of the OSC signal. Since at the rising edge
of the OSC clock, the refreshed switches are being opened,
if the load changes at that time, it will generate an error
output voltage. For a fixed load condition, the internal
oscillator can be used.
For the transient load condition, the external OSC mode
should be used to avoid the conflict between the rising edge
of the OSC signal and the changing load. So a timing delay
circuit will be needed to delay the OSC signal and avoid the
rising edge of the OSC signal and changing the load at the
same time.
Channel 3 - sinking and sourcing 5mA current
Channel 2 - EXT_OSC signal
Channel 1 - V
Here, the OSC signal is synchronized to the load signal. The
rising edge of the OSC signal is then delayed by some
amount of time and gives enough time for CH to be charged
to a new voltage before the switches are opened.
FIGURE 12. TRANSIENT LOAD RESPONSE
V
I
OSC
OUT
OUT
OUT
M=400µs/DIV
9
IN
EL5225
Ch1 - Output1
Ch3 - Output2
Ch2 - EXT_OSC
At the falling edge of the OSC, output 1 is refreshing and one
clock cycle later, output2 is being refreshed. The spike you
see here is the response of the output amplifier when the
refreshed switches are closed. When driving a big capacitor
load, there will be ringing at the spikes because the phase
margin of the amplifier is decreased.
The speed of the external OSC signal shouldn’t be greater
than 70kHz because for the worst condition, it will take at
least 4µs to charge the sample and hold Capacitor CH. The
pulse width has to be at least 4µs long. From our lab test, the
duty cycle of the OSC signal must be greater than 30%.
POWER DISSIPATION
With the 30mA maximum continues output drive capability
for each channel, it is possible to exceed the 125°C absolute
maximum junction temperature. Therefore, it is important to
calculate the maximum junction temperature for the
application to determine if load conditions need to be
modified for the part to remain in the safe operation.
The maximum power dissipation allowed in a package is
determined according to:
where:
• T
• T
• θ
• P
P
DMAX
JA
AMAX
JMAX
DMAX
= Thermal resistance of the package
FIGURE 13. CHANNEL-TO-CHANNEL REFRESH
=
= Maximum junction temperature
= Maximum ambient temperature
= Maximum power dissipation in the package
T
-------------------------------------------- -
JMAX
V
V
OSC
OUT1
OUT2
Θ
- T
JA
AMAX
M=400µs/DIV
March 11, 2004
FN7356.0