S-875041CUP-ACCT2G Seiko Instruments, S-875041CUP-ACCT2G Datasheet - Page 28
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S-875041CUP-ACCT2G
Manufacturer Part Number
S-875041CUP-ACCT2G
Description
IC VOLT DETECT/REG 5.0V SOT89-5
Manufacturer
Seiko Instruments
Datasheet
1.S-872622BUP-OLAT2G.pdf
(53 pages)
Specifications of S-875041CUP-ACCT2G
Applications
Converter, Constant Voltage Power Supply
Voltage - Input
1.3 ~ 24 V
Number Of Outputs
1
Voltage - Output
5V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SOT-89-5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
28
HIGH WITHSTAND-VOLTAGE VOLTAGE REGULATOR WITH RESET FUNCTION
S-87x Series
1. Reference voltage circuit
2. Voltage regulator
3. Short-circuit protection circuit
Operation
The reference voltage circuit operates all the time when the voltage is applied to VIN pin and is not
affected by the V
Figure 18 shows the voltage regulator circuit. The S-87x Series has a Pch MOS transistor as the output
control transistor.
Reverse current may break IC if V
between V
V
The output voltage of the voltage regulator can be selected as follows:
2.5 V to 5.8 V ± 2.4 % (0.1 V step)
*1. Parasitic diode
Caution For an application with a load current of less than 1 μA, the leakage current of the control
The S-87x Series has a built-in short-circuit protection circuit to protect the element from break caused by
a large current in case of a short circuit. The output short current is internally limited to approx. 70 mA.
Short-circuit protection circuit has three kinds characteristics according to input voltage (V
Figure 19 to 21 .
At 5 V Output:
(a) V
IN
+ 0.3 V.
V
[V]
OUT
IN
/V
transistor M1 increases the output voltage.
OUT
IN
Figure 19
and V
≥2.0
I
OS
PF
OUT
I
max
signal.
due to the structure of the control transistor. Therefore, keep V
[mA]
I
OUT
V
REF
Figure 18 Voltage regulator
OUT
(b) 1.5≤V
V
potential is higher than V
[V]
−
+
Seiko Instruments Inc.
OUT
IN
Figure 20
/V
OUT
I
OS
<2.0
M1
V
IN
R
R
2
1
[mA]
I
IN
OUT
*1
, because a parasitic diode is formed
circuit
V
OUT
(c) V
V
[V]
OUT
IN
/V
OUT
<1.5
Figure 21
OUT
I
OS
lower than
IN
) as shown in
Rev.8.0
[mA]
I
OUT
_00