LT1943EFE Linear Technology, LT1943EFE Datasheet - Page 11

• Manufacturer Part Number: LT1943EFE
• Description: IC REG SW QUAD TFT LCD 28-TSSOP
• Manufacturer: Linear Technology

Specifications of LT1943EFE

• Applications: Converter, TFT, LCD
• Voltage - Input: 4.5 ~ 22 V
• Number Of Outputs: 4
• Voltage - Output: 1.25 ~ 40 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

OPERATIO
The control loop for the four switchers is similar. A pulse
from the slave oscillator sets the RS latch and turns on the
internal NPN bipolar power switch. Current in the switch
and the external inductor begins to increase. When this
current exceeds a level determined by the voltage at V
current comparator resets the latch, turning off the switch.
The current in the inductor flows through the Schottky
diode and begins to decrease. The cycle begins again at the
next pulse from the oscillator. In this way, the voltage on
the V
output. The internal error amplifier regulates the output
voltage by continually adjusting the V
threshold for switching on the V
clamp of 1.8V limits the output current. The RUN/SS and
SS-234 pins also clamp the V
current source charges the external soft-start capacitor,
the current limit increases slowly.
Each switcher contains an extra, independent oscillator to
perform frequency foldback during overload conditions.
This slave oscillator is normally synchronized to the mas-
ter oscillator. A comparator senses when V
0.5V and switches the regulator from the master oscillator
to a slower slave oscillator. The V
during startup, short-circuit, and overload conditions.
Frequency foldback helps limit switch current and power
dissipation under these conditions.
The switch driver for SW1 operates either from V
the BOOST pin. An external capacitor and diode are used
to generate a voltage at the BOOST pin that is higher than
the input supply. This allows the driver to saturate the
internal bipolar NPN power switch for efficient operation.
STEP-DOWN CONSIDERATIONS
FB Resistor Network
The output voltage for switcher 1 is programmed with a
resistor divider (refer to the Block Diagram) between the
output and the FB pin. Choose the resistors according to:
R1 should be 10kΩ or less to avoid bias current errors.
R2 = R1(V
C
pin controls the current through the inductor to the
OUT
/1.25V – 1)
U
C
pin voltage. As the internal
C
pin is 0.8V, and an active
FB
pin is less than 0.5V
C
pin voltage. The
FB
is less than
IN
or from
C
, the
Input Voltage Range
The minimum operating voltage of switcher 1 is deter-
mined either by the LT1943’s undervoltage lockout of ~4V,
or by its maximum duty cycle. The duty cycle is the fraction
of time that the internal switch is on and is determined by
the input and output voltages:
where V
(~0.4V) and V
(~0.3V at maximum load). This leads to a minimum input
voltage of
with DC
Inductor Selection and Maximum Output Current
A good first choice for the inductor value is:
where V
L is in µH. The inductor’s RMS current rating must be
greater than the maximum load current and its saturation
current should be at least 30% higher. For highest effi-
ciency, the series resistance (DCR) should be less than
0.1Ω. Table 1 lists several vendors and types that are
suitable.
The optimum inductor for a given application may differ
from the one indicated by this simple design guide. A
larger value inductor provides a higher maximum load
current, and reduces the output voltage ripple. If your load
is lower than the maximum load current, then you can
relax the value of the inductor and operate with higher
ripple current. This allows you to use a physically smaller
inductor, or one with a lower DCR resulting in higher
efficiency. Be aware that the maximum load current
depends on input voltage. A graph in the Typical Perfor-
mance section of this data sheet shows the maximum load
current as a function of input voltage and inductor value
for V
discontinuous mode operation, which further reduces
DC = (V
V
L = (V
IN(MIN)
OUT
MAX
F
F
OUT
= 3.3V. In addition, low inductance may result in
is the voltage drop of the catch diode (~0.4V) and
is the forward voltage drop of the catch diode
OUT
= (V
= 0.82.
+ V
SW
+ V
OUT
F
is the voltage drop of the internal switch
)/1.2
F
)/(V
+ V
IN
F
)/DC
– V
SW
MAX
+ V
– V
F
)
F
+ V
SW
LT1943
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