LTC3831EGN#TR Linear Technology, LTC3831EGN#TR Datasheet - Page 18

• Manufacturer Part Number: LTC3831EGN#TR
• Description: IC SW REG CONTROLLR SYNC 16-SSOP
• Manufacturer: Linear Technology

Specifications of LTC3831EGN#TR

• Applications: Controller, DDR
• Voltage - Input: 3 ~ 8 V
• Number Of Outputs: 1
• Voltage - Output: 1.27 ~ 4 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: LTC3831EGNTR

APPLICATIONS INFORMATION
LTC3831
LAYOUT CONSIDERATIONS
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3831. These items are also illustrated graphically
in the layout diagram of Figure 10. The thicker lines show
the high current paths. Note that at 5A current levels or
above, current density in the PC board itself is a serious
concern. Traces carrying high current should be as wide as
possible. For example, a PCB fabricated with 2oz copper
requires a minimum trace width of 0.15” to carry 5A .
1. In general, layout should begin with the location of the
2. The GND and PGND pins should be shorted directly at
18
power devices. Be sure to orient the power circuitry so
that a clean power fl ow path is achieved. Conductor
widths should be maximized and lengths minimized.
After you are satisfi ed with the power path, the control
circuitry should be laid out. It is much easier to fi nd
routes for the relatively small traces in the control cir-
cuits than it is to fi nd circuitous routes for high current
paths.
the LTC3831 . This helps to minimize internal ground
disturbances in the LTC3831 and prevents differences
in ground potential from disrupting internal circuit
operation. This connection should then tie into the
ground plane at a single point, preferably at a fairly
quiet point in the circuit such as close to the output
capacitors . This is not always practical, however, due
to physical constraints. Another reasonably good point
to make this connection is between the output capaci-
3. The small-signal resistors and capacitors for frequency
4. The V
5. The (+) plate of C
6. The V
7. In a typical SSTL application, if the R
8. Kelvin sense I
tors and the source connection of the bottom MOSFET
Q2. Do not tie this single point ground in the trace run
between the Q2 source and the input capacitor ground,
as this area of the ground plane will be very noisy.
compensation and soft-start should be located very close
to their respective pins and the ground ends connected
to the signal ground pin through a separate trace. Do
not connect these parts to the ground plane!
be as close to the LTC3831 as possible. The 4.7μF and
1μF bypass capacitors shown at V
will help provide optimum regulation performance.
possible to the drain of the upper MOSFET, Q1. An ad-
ditional 1μF ceramic capacitor between V
ground is recommended.
node. Care should be taken to isolate V
capacitive coupling to the inductor switching signal.
nected to V
for the switching regulator, do not connect R
high current fl ow path; it should be connected to the
SSTL interface supply output. R
to the interface supply GND.
pins.
CC
FB
, PV
pin is very sensitive to pickup from the switching
CC1
DDQ
and PV
MAX
, which is also the main supply voltage
IN
and I
should be connected as close as
CC2
FB
decoupling capacitors should
at Q1’s drain and source
–
should be connected
CC
, PV
+
FB
pin is to be con-
CC1
from possible
IN
and power
+
and PV
along the
3831fb
CC2