LTC3717EGN Linear Technology, LTC3717EGN Datasheet - Page 9

IC STEP-DWN CONTRLR SYNC 16-SSOP

LTC3717EGN

Manufacturer Part Number
LTC3717EGN
Description
IC STEP-DWN CONTRLR SYNC 16-SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC3717EGN

Applications
Controller, DDR, QDR
Voltage - Input
4 ~ 36 V
Number Of Outputs
1
Voltage - Output
2 ~ 18 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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APPLICATIO S I FOR ATIO
the LTC3717 and external component values and a good
guide for selecting the sense resistance is:
An external resistive divider from INTV
the voltage of the V
in nominal sense voltages of 50mV to 200mV. Additionally,
the V
the nominal sense voltage defaults to 70mV or 140mV,
respectively. The maximum allowed sense voltage is about
1.3 times this nominal value for positive output current and
1.7 times the nominal value for negative output current.
Power MOSFET Selection
The LTC3717 requires two external N-channel power MOS-
FETs, one for the top (main) switch and one for the bottom
(synchronous) switch. Important parameters for the power
MOSFETs are the breakdown voltage V
voltage V
capacitance C
The gate drive voltage is set by the 5V INTV
Consequently, logic-level threshold MOSFETs must be
used in LTC3717 applications. If the input voltage is
expected to drop below 5V, then sub-logic level threshold
MOSFETs should be considered.
When the bottom MOSFET is used as the current sense
element, particular attention must be paid to its on-
resistance. MOSFET on-resistance is typically specified
with a maximum value R
additional margin is required to accommodate the rise in
MOSFET on-resistance with temperature:
The
accounting for the significant variation in on-resistance
with temperature, typically about 0.4%/ C as shown in
Figure 2. For a maximum junction temperature of 100 C,
using a value
The power dissipated by the top and bottom MOSFETs
strongly depends upon their respective duty cycles and
R
R
SENSE
DS ON MAX
RNG
T
(
term is a normalization factor (unity at 25 C)
pin can be tied to SGND or INTV
(GS)TH
)(
10 •
RSS
T
, on-resistance R
)
= 1.3 is reasonable.
I
V
and maximum current I
OUT MAX
RNG
RNG
U
R
SENSE
(
pin between 0.5V and 2V resulting
T
DS(ON)(MAX)
U
)
DS(ON)
W
at 25 C. In this case,
CC
(BR)DSS
, reverse transfer
can be used to set
CC
DS(MAX)
in which case
, threshold
CC
U
.
supply.
the load current. During LTC3717’s normal operation, the
duty cycles for the MOSFETs are:
The resulting power dissipation in the MOSFETs at maxi-
mum output current are:
Both MOSFETs have I
includes an additional term for transition losses, which are
largest at high input voltages. The constant k = 1.7A
be used to estimate the amount of transition loss. The
bottom MOSFET losses are greatest when the bottom duty
cycle is near 100%, during a short-circuit or at high input
voltage.
Operating Frequency
The choice of operating frequency is a tradeoff between
efficiency and component size. Low frequency operation
improves efficiency by reducing MOSFET switching losses
but requires larger inductance and/or capacitance in order
to maintain low output ripple voltage.
The operating frequency of LTC3717 applications is deter-
mined implicitly by the one-shot timer that controls the
P
P
D
D
TOP
BOT
BOT
TOP
= D
= D
+ k V
V
V
TOP
BOT
V
IN
OUT
0.5
2.0
1.5
1.0
Figure 2. R
IN
0
– 50
IN
V
I
I
OUT(MAX)
OUT(MAX)
IN
2
V
OUT
I
OUT(MAX)
JUNCTION TEMPERATURE ( C)
0
DS(ON)
2
R losses and the top MOSFET
2
2
T(TOP)
T(BOT)
C
vs. Temperature
50
RSS
f
R
R
DS(ON)(MAX)
DS(ON)(MAX)
100
LTC3717
3717 F02
150
sn3717 3717fs
–1
9
can

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