LP2996LQ/NOPB National Semiconductor, LP2996LQ/NOPB Datasheet - Page 12

IC DDR TERMINATION REG 16LLP

LP2996LQ/NOPB

Manufacturer Part Number
LP2996LQ/NOPB
Description
IC DDR TERMINATION REG 16LLP
Manufacturer
National Semiconductor
Datasheet

Specifications of LP2996LQ/NOPB

Applications
Converter, DDR
Voltage - Input
2.2 ~ 5.5 V
Number Of Outputs
1
Operating Temperature
0°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-LLP
Polarity
Positive
Input Voltage Max
5.5 V
Output Voltage
1.159 V, 1.259 V, 1.359 V
Output Type
Fixed
Output Current
1.5 A
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Reference Voltage
1.358 V
Primary Input Voltage
2.5V
No. Of Outputs
1
No. Of Pins
16
Operating Temperature Range
0°C To +125°C
Msl
MSL 3 - 168 Hours
Input Voltage Primary Max
5V
Rohs Compliant
Yes
For Use With
LP2996LQEVAL - BOARD EVALUATION LP2996LQ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Output
-
Lead Free Status / Rohs Status
 Details
Other names
LP2996LQ
LP2996LQTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LP2996LQ/NOPB
Manufacturer:
National Semiconductor
Quantity:
1 785
Company:
Part Number:
LP2996LQ/NOPB
Quantity:
5 000
www.national.com
DDR-II APPLICATIONS
With the separate VDDQ pin and an internal resistor divider
it is possible to use the LP2996 in applications utilizing DDR-
II memory.
tions of recommended circuits with output curves displayed
in the Typical Performance Characteristics.
If it is not desirable to use the 1.8V rail it is possible to connect
the output stage to a 3.3V rail. Care should be taken to not
exceed the maximum junction temperature as the thermal
dissipation increases with lower V
Figure 6
and
Figure 7
FIGURE 7. SSTL-2 Implementation with higher voltage rails
TT
show several implementa-
FIGURE 9. DDR-II Termination with higher voltage rails
output voltages. For this
FIGURE 8. Recommended DDR-II Termination
Figure 6
shows
12
the recommended circuit configuration for DDR-II applica-
tions. The output stage is connected to the 1.8V rail and the
AVIN pin can be connected to either a 3.3V or 5V rail. For new
designs, the LP2997 or LP2998 is recommended for DDR-II
applications.
reason it is not recommended to power PVIN off a rail higher
than the nominal 3.3V. The advantage of this configuration is
that it has the ability to source and sink a higher maximum
continuous current.
20057512
20057514
20057513

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