LP2997MR/NOPB National Semiconductor, LP2997MR/NOPB Datasheet - Page 8

• Manufacturer Part Number: LP2997MR/NOPB
• Description: IC DDR-II TERMINATION REG 8-PSOP
• Manufacturer: National Semiconductor

Specifications of LP2997MR/NOPB

• Applications: Converter, DDR2
• Voltage - Input: 2.2 ~ 5.5 V
• Number Of Outputs: 1
• Operating Temperature: 0°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-PSOP
• Primary Input Voltage: 1.8V
• No. Of Outputs: 1
• No. Of Pins: 8
• Output Current: 500mA
• Operating Temperature Range: 0°C To +125°C
• Msl: MSL 3 - 168 Hours
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -
• Other names: *LP2997MR; *LP2997MR/NOPB; LP2997MR

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tion and the requirements for load transient response of V
As a general recommendation the output capacitor should be
sized above 100 µF with a low ESR for SSTL applications with
DDR-SDRAM. The value of ESR should be determined by the
maximum current spikes expected and the extent at which the
output voltage is allowed to droop. Several capacitor options
are available on the market and a few of these are highlighted
below:
AL - It should be noted that many aluminum electrolytics only
specify impedance at a frequency of 120 Hz, which indicates
they have poor high frequency performance. Only aluminum
electrolytics that have an impedance specified at a higher fre-
quency (100 kHz) should be used for the LP2997. To improve
the ESR several AL electrolytics can be combined in parallel
for an overall reduction. An important note to be aware of is
the extent at which the ESR will change over temperature.
Aluminum electrolytic capacitors can have their ESR rapidly
increase at cold temperatures.
Ceramic - Ceramic capacitors typically have a low capaci-
tance, in the range of 10 to 100 µF range, but they have
excellent AC performance for bypassing noise because of
very low ESR (typically less than 10 mΩ). However, some
dielectric types do not have good capacitance characteristics
as a function of voltage and temperature. Because of the typ-
ically low value of capacitance it is recommended to use
ceramic capacitors in parallel with another capacitor such as
an aluminum electrolytic. A dielectric of X5R or better is rec-
ommended for all ceramic capacitors.
Hybrid - Several hybrid capacitors such as OS-CON and SP
are available from several manufacturers. These offer a large
capacitance while maintaining a low ESR. These are the best
solution when size and performance are critical, although
their cost is typically higher than any other capacitors.
Thermal Dissipation
Since the LP2997 is a linear regulator any current flow from
V
To prevent damaging the part from exceeding the maximum
allowable junction temperature, care should be taken to der-
ate the part dependent on the maximum expected ambient
temperature and power dissipation. The maximum allowable
internal temperature rise (T
maximum ambient temperature (T
the maximum allowable junction temperature (T
From this equation, the maximum power dissipation (P
of the part can be calculated:
The θ
the package used; the thickness of copper; the number of vias
and the airflow. For instance, the θ
with the package mounted to a standard 8x4 2-layer board
with 1oz. copper, no airflow, and 0.5W dissipation at room
temperature. This value can be reduced to 151.2°C/W by
changing to a 3x4 board with 2 oz. copper that is the JEDEC
standard.
the two boards mentioned.
TT
will result in internal power dissipation generating heat.
JA
of the LP2997 will be dependent on several variables:
Figure 1
shows how the θ
T
P
Rmax
Dmax
= T
= T
Rmax
Jmax
Rmax
) can be calculated given the
− T
Amax
JA
/ θ
JA
Amax
of the SO-8 is 163°C/W
JA
) of the application and
varies with airflow for
Jmax
).
Dmax
TT
)
.
8
Additional improvements can be made by the judicious use of
vias to connect the part and dissipate heat to an internal
ground plane. Using larger traces and more copper on the top
side of the board can also help. With careful layout it is pos-
sible to reduce the θ
in
Optimizing the θ
board exposed to lower ambient temperature allows the part
to operate with higher power dissipation. The internal power
dissipation can be calculated by summing the three main
sources of loss: output current at V
ing, and quiescent current at AVIN and VDDQ. During the
active state (when shutdown is not held low) the total internal
power dissipation can be calculated from the following equa-
tions:
Where,
To calculate the maximum power dissipation at V
ditions at V
current. Although only one equation will add into the total,
V
The power dissipation of the LP2997 can also be calculated
during the shutdown state. During this condition the output
V
disappear as it cannot sink or source any current (leakage is
negligible). The only losses during shutdown will be the re-
duced quiescent current at AVIN and the constant impedance
that is seen at the VDDQ pin.
TT
TT
Figure 1
cannot source and sink current simultaneously.
will tri-state, therefore that term in the power equation will
P
P
P
VDDQ
VDDQ
VTT
TT
FIGURE 1. θ
P
need to be examined, sinking and sourcing
= ( V
VTT
JA
= V
= V
P
D
and placing the LP2997 in a section of a
= V
JA
= P
VDDQ
P
VDDQ
P
PVIN
P
AVIN
AVIN
D
further than the nominal values shown
VTT
AVIN
= P
- V
* I
* I
JA
= I
= I
x I
AVIN
VDDQ
VTT
VDDQ
+ P
AVIN
AVIN
vs Airflow (SO-8)
LOAD
) x I
VDDQ
+ P
= V
= V
x V
* V
(Sinking) or
TT
LOAD
VDDQ
AVIN
, either sinking or sourc-
VDDQ
AVIN
VDDQ
+ P
(Sourcing)
VTT
2
2
x R
x R
VDDQ
VDDQ
TT
20109407
both con-