UC3845DR2G ON Semiconductor, UC3845DR2G Datasheet - Page 10
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UC3845DR2G
Manufacturer Part Number
UC3845DR2G
Description
IC CTRLR CURRENT MODE HP 14SOIC
Manufacturer
ON Semiconductor
Type
High Performance Current Mode Controllersr
Datasheet
1.UC3845DR2.pdf
(16 pages)
Specifications of UC3845DR2G
Pwm Type
Current Mode
Number Of Outputs
1
Frequency - Max
60kHz
Duty Cycle
50%
Voltage - Supply
8.2 V ~ 25 V
Buck
No
Boost
Yes
Flyback
Yes
Inverting
Yes
Doubler
No
Divider
No
Cuk
No
Isolated
Yes
Operating Temperature
0°C ~ 70°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Frequency-max
60kHz
Output Voltage Range
4.9 V to 5.1 V
Input Voltage Range
30 V
Operating Temperature Range
0 C to + 70 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
UC3845DR2GOS
V
Clamp
I
C
pk(max)
R2
R1
t
Softstart
Figure 22. Adjustable Buffered Reduction of
8(14)
R2
R1
4(7)
2(3)
1(1)
≈
8(14)
Figure 20. Adjustable Reduction of Clamp Level
4(7)
R
R
2(3)
1(1)
= − In
MPSA63
1.67
2
1
V
V
Clamp
Clamp
R
+ 1
S
Clamp Level with Soft−Start
+
−
EA
R
R
+
−
+ 0.33 x 10
1 −
+
Where: 0 ≤ V
EA
R
R
R
R
OSC
1.67
2
1
1.0mA
Bias
+
3V
OSC
+ 1
1.0mA
Bias
V
2R
Clamp
−3
C
R
+ 0.33 x 10
2R
Clamp
R
5(9)
V
C
≤ 1.0 V
Clamp
R
5(9)
−
R
+
V
1.0V
1
5.0V
1
R
Clamp
−3
R
+ R
1
−
+
R
1
−
+
1.0V
5.0V
+
−
+ R
2
ref
2
R
−
+
−
+
R
2
5.0V
+
−
R
2
ref
1
1
Comp/Latch
+ R
−
+
Comp/Latch
S
R
+
−
R
ref
T
Q
2
S
R
2
Comp/Latch
T
Figure 24. Current Waveform Spike Suppression
Q
I
S
R
pk(max)
+
T
−
Q
Where: 0 ≤ V
+
−
+
7(12)
−
≈
+
−
+
7(12)
−
V
+
Clamp
7(12)
−
R
http://onsemi.com
Clamp
V
S
CC
7(11)
6(10)
5(8)
3(5)
V
CC
7(11)
6(10)
5(8)
3(5)
≤ 1.0 V
V
CC
7(11)
6(10)
5(8)
3(5)
10
Q1
Q1
R
V
R
V
S
in
S
in
C
R
Virtually lossless current sensing can be achieved with the implement of a SENSEFET
power switch. For proper operation during over current conditions, a reduction of the
I
pk(max)
−
+
5.0V
Figure 23. Current Sensing Power MOSFET
Q1
R
V
clamp level must be implemented. Refer to Figures 20 and 22.
−
+
+
−
S
in
ref
C
Comp/Latch
S
R
The addition of the RC filter will eliminate
instability caused by the leading edge spike on
the current waveform.
T
Q
Control CIrcuitry
8(14)
4(7)
2(3)
1(1)
t
+
To Pin (9)
−
Soft−Start
Ground:
Figure 21. Soft−Start Circuit
+
(12)
−
3600C in mF
+
−
EA
R
R
V
CC
+
(11)
(10)
(8)
(5)
OSC
1.0mA
Bias
G
1/4 W
R
2R
M
S
D
R
SENSEFET
V
in
To Input Source
K
Power Ground
5(9)
S
If: SENSEFET = MTP10N10M
Return
V
−
Pin
+
1.0V
5.0V
Then: V
5 ≈
−
+
+
−
ref
R
r
pin
S
DM(on)
R
S
R
T
I
S
5 = 0.075 I
pk
Q
= 200
r
DS(on)
+ R
S
pk