UC3843BVD1R2 ON Semiconductor, UC3843BVD1R2 Datasheet - Page 11
UC3843BVD1R2
Manufacturer Part Number
UC3843BVD1R2
Description
IC CTRLR CURRENT MODE HP 8SOIC
Manufacturer
ON Semiconductor
Datasheet
1.UC3842BDR2G.pdf
(21 pages)
Specifications of UC3843BVD1R2
Pwm Type
Current Mode
Number Of Outputs
1
Frequency - Max
275kHz
Duty Cycle
96%
Voltage - Supply
8.2 V ~ 25 V
Buck
No
Boost
Yes
Flyback
Yes
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
Yes
Operating Temperature
-40°C ~ 105°C
Package / Case
8-SOIC (3.9mm Width)
Frequency-max
275kHz
Duty Cycle (max)
96 %
Output Voltage
4.9 V to 5.1 V
Output Current
1000 mA
Mounting Style
SMD/SMT
Switching Frequency
500 KHz
Operating Supply Voltage
30 V
Maximum Operating Temperature
+ 105 C
Fall Time
50 ns
Minimum Operating Temperature
- 40 C
Rise Time
50 ns
Synchronous Pin
No
Topology
Boost, Flyback, Forward
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
UC3843BVD1R2OSTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UC3843BVD1R2G
Manufacturer:
ST
Quantity:
15 600
Part Number:
UC3843BVD1R2G
Manufacturer:
ON/安森美
Quantity:
20 000
DI
Inductor
Current
Control Voltage
f +
C
Control Voltage
R
R
6
5
2
A
B
(R A ) 2R B )C
8
1.44
Figure 20. Continuous Current Waveforms
Figure 22. External Duty Cycle Clamp and
1
5.0k
5.0k
5.0k
t
t
4
0
m
MC1455
Multi−Unit Synchronization
1
R
S
Oscillator Period
Dl ) Dl m 2
D (max) +
Q
4
DI
m
Oscillator Period
1
m 1
R A ) 2R B
m
t
3
7
2
1
R B
m
3
(B)
(A)
8(14)
4(7)
2(3)
1(1)
t
Dl ) Dl m 2
2
t
m
5
To Additional
UCX84XBs
2
EA
m 1
R
R
m 2
m 1
+
Osc
Bias
http://onsemi.com
2R
Inductor
Current
R
t
3
t
6
5(9)
11
R
R
2
1
V
8(14)
Clamp
4(7)
2(3)
1(1)
Figure 23. Adjustable Reduction of Clamp Level
External
≈
The diode clamp is required if the Sync amplitude is large enough to cause the bottom
side of C
Sync
Input
R 2
R 1
R
R
Figure 21. External Clock Synchronization
EA
T
1.67
) 1
to go more than 300 mV below ground.
+
Osc
Bias
1.0 mA
0.01
+ 0.33x10
2R
R
C
-
+
-3
R
47
T
V
5(9)
T
Clamp
1.0V
R 1 ) R 2
R 1 R 2
5.0V Ref
8(14)
V
4(7)
2(3)
1(1)
ref
Comp/Latch
S
R
Where: 0 ≤ V
I pk(max) [
Q
EA
R
R
Clamp
+
V Clamp
Osc
7(12)
R S
+
-
Bias
≤ 1.0 V
V
CC
7(11)
6(10)
5(8)
3(5)
2R
R
5(9)
V
Q1
R
in
S