IR3651SPBF International Rectifier, IR3651SPBF Datasheet - Page 11

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IR3651SPBF

Manufacturer Part Number
IR3651SPBF
Description
IC CTLR SYNC PWM BUCK 14-SOIC
Manufacturer
International Rectifier
Datasheet

Specifications of IR3651SPBF

Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
460kHz
Duty Cycle
80%
Voltage - Supply
4.5 V ~ 13.2 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 125°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Frequency-max
460kHz
Package
14-Pin SOIC (NB)
Circuit
Sync PWM Controller
Vcc (min)
4.5
Vcc (max)
13.2
Iout (a)
25
Switch Freq (khz)
programmable to 400kHz
Pbf
PbF Option Available
For Use With
IRDC3651 - KIT REF DESIGN SYNCH BUCK REG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
An over current is detected if the OCSet pin goes
below ground. This trips the OCP comparator
and cycles the soft start function in hiccup mode.
The hiccup is performed by charging and
discharging the soft-start capacitor in certain
slope rate. As shown in figure 7 a 3uA current
source is used to discharge the soft-start
capacitor.
The OCP comparator resets after every soft start
cycles, the converter stays in this mode until the
overload or short circuit is removed. The
converter will automatically recover.
Over-Current Protection
The over current protection is performed by
sensing current through the R
MOSFET. This method enhances the converter’s
efficiency and reduce cost by eliminating a
current sense resistor. As shown in figure 6, an
external resistor (R
turned on, the inductor current flows through the
Q2 and results a voltage which is given by:
The critical inductor current can be calculated by
setting:
OCSet pin and the drain of low side MOSFET
(Q2) which sets the current limit set point.
The internal current source develops a voltage
across R
Hiccup
Control
Fig. 6: Connection of over current sensing resistor
12/07/2010
V
IR3651
OCSet
V
I
OCSet
I
SET
SET
SET
=
(I
=
I
=
OCSET
. When the low side MOSFET is
OCSet
=
I
I
L
(I
L
(
(
critical
critical
OCSet
R
)
)
OCSet
=
=
R
SET
OCSet
R
1
OCSet
.
OCSet
)
5
R
) is connected between
*
DS
(R
)
I
R
o
(
SET
on
+
DS(on)
I
OCSet
(R
)
Δ
2
DS(on)
i
L
DS(on)
I
Q1
Q2
L
)
) I
--(
L
) 3
of low side
=
--(
L1
0
) 2
V
OUT
The value of R
circuit to ensure that the over current protection
circuit activates as expected. The IR3651 current
limit is designed primarily as disaster preventing,
"no blow up" circuit, and doesn't operate as a
precision current regulator.
The
approximately 200ns before the low gate drive
turns off. The OCSet pin is internally clamped to
about 1.5V during deadtime to prevent false
trigging, figure 8 shows the OCSet pin during one
switching cycle.
Ch1: Inductor point, Ch2:Ldrv, Ch3:OCSet
Fig. 8: OCset pin during normal condition
Fig. 7: 3uA current source for discharging
OCP
SS / SD
soft-start capacitor during hiccup
circuit
SET
3
should be checked in an actual
starts
10uA
3uA
IR3651SPBF
sampling
Hiccup
current
11

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