IR3637ASPBF International Rectifier, IR3637ASPBF Datasheet - Page 10

• Manufacturer Part Number: IR3637ASPBF
• Description: IC CTLR SYNC BUCK REG 8-SOIC
• Manufacturer: International Rectifier

Specifications of IR3637ASPBF

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 660kHz
• Duty Cycle: 76%
• Voltage - Supply: 4.5 V ~ 5.5 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 125°C
• Package / Case: 8-SOIC (3.9mm Width)
• Frequency-max: 660kHz
• Package: 8-Pin SOIC(NB)
• Circuit: Sync PWM Controller with 1% accuracy
• Vcc (min): 4.0
• Vcc (max): 25
• Vout (min): 0.8
• Vout (max): Vcc * 0.85
• Iout (a): 15
• Switch Freq (khz): Internal 600kHz
• Pbf: PbF Option Available
• For Use With: IRPP3637-12A - KIT REF DES 12A 1PH SYNC BUCKIRDC3637 - BOARD EVAL SYNC BUCK REGULATOR
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IR3637ASPbF
For a general solution for unconditionally stability for any
type of output capacitors, in a wide range of ESR values
we should implement local feedback with a compensa-
tion network. The typically used compensation network
for voltage-mode controller is shown in Figure 10.
In such configuration, the transfer function is given by:
The error amplifier gain is independent of the transcon-
ductance under the following condition:
By replacing Z
former function can be expressed as:
H(s)=
As known, transconductance amplifier has high imped-
ance (current source) output, therefore, consider should
be taken when loading the E/A output. It may exceed its
source/sink output current capability, so that the ampli-
fier will not be able to swing its output voltage over the
necessary range.
The compensation network has three poles and two ze-
ros and they are expressed as follows:
10
H(s) dB
g
V
Figure 10 - Compensation network with local
V
m
OUT
sR
Z
e
Z
IN
feedback and its asymptotic gain plot.
Gain(dB)
f
6
(C
>> 1
=
R
C
1
8
12
1 +
10
+C
1 -
F
IN
V
Z
11
g
g
and Z
1
OUT
)
and
m
m
×
R
R
Z
Z
6
5
[
IN
f
1+sR
F
f
Z
according to Figure 7, the trans-
V
(1+sR
2
Fb
REF
g
m
7
Z
(
IN
7
C
C
C
R
>>1
12
11
12
7
F
E/A
×C
)×[1+sC
+C
P
2
11
C
11
)]
12
F
×(1+sR
C
10
P
Comp
---(14)
3
11
(R
Frequency
6
+R
Z
8
8
)]
Ve
C
f
10
)
Cross Over Frequency:
The stability requirement will be satisfied by placing the
poles and zeros of the compensation network according
to following design rules. The consideration has been
taken to satisfy condition (14) regarding transconduc-
tance error amplifier.
1) Select the crossover frequency:
2) Select R
3) Place first zero before LC’s resonant frequency pole.
4) Place third pole at the half of the switching frequency.
5) Place R
F
F
F
F
F
F
Where:
V
V
Lo = Output Inductor
Co = Total Output Capacitors
C
F
C
C
Fo < F
F
C
If not, change R
P1
P2
P3
Z1
Z2
O
P3
IN
OSC
Z1
11
12
12
10
= R
= Maximum Input Voltage
=
> 50pF
= 0
=
=
=
=
=
=
≤
= Oscillator Ramp Voltage
75% F
2π×C
2π×R
2π × R
2π×R
2π×R
f
2π × F
2
7
ESR
S
2π × Lo × Fo × Co
×C
7
7
in (15) and calculate C
, so that R
and Fo ≤ (1/10 ~ 1/6)× f
1
10
LC
1
8
10
7
1
×C
7
×
×
×C
1
7
×(R
Z1
1
× F
(
7
V
× R
R
10
1
V
selection.
11
C
OSC
7
C
6
IN
12
P3
+ R
12
7
×
×C
7
+C
>>
8
)
11
2π×Lo×Co
11
)
g
2
m
2π×C
×
1
2π×R
10
V
V
:
1
OSC
10
IN
S
×R
1
7
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×C
6
---(15)
12