CS51022ADBG ON Semiconductor, CS51022ADBG Datasheet - Page 8

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CS51022ADBG

Manufacturer Part Number
CS51022ADBG
Description
IC CTRLR PWM ENH SYNC 16-TSSOP
Manufacturer
ON Semiconductor
Datasheet

Specifications of CS51022ADBG

Pwm Type
Current Mode
Number Of Outputs
1
Frequency - Max
1MHz
Duty Cycle
83%
Voltage - Supply
8.2 V ~ 20 V
Buck
Yes
Boost
No
Flyback
No
Inverting
Yes
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Frequency-max
1MHz
Duty Cycle (max)
83 %
Output Current
1000 mA
Mounting Style
SMD/SMT
Switching Frequency
1000 KHz
Operating Supply Voltage
- 0.3 V to + 20 V
Maximum Operating Temperature
+ 150 C
Fall Time
15 ns
Rise Time
60 ns
Synchronous Pin
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS51022ADBG
Manufacturer:
ON Semiconductor
Quantity:
31
Part Number:
CS51022ADBG
Manufacturer:
ON/安森美
Quantity:
20 000
Slope Compensation
current sense signal with slope compensation to avoid
instability at duty cycles greater than 50%. Slope capacitor
C
discharged during the oscillator discharge time. The slope
compensation voltage is divided by 10 and is added to the
current sense voltage, V
input of the PWM comparator is a combination of these two
voltages. The slope compensation, dV
calculated using the following formula:
cause an error when determining slope compensation
capacitance C
of C
the internal capacitance. The effect is apparent as a reduction
in charging current due to the need to charge the internal
capacitance in parallel with C
curve indicating this decrease in available charging current.
Undervoltage (UV) and Overvoltage (OV) Monitor
conditions. A string of three resistors is connected in series
between the monitored voltage (usually the input voltage)
and ground (see Figure 5). When voltage at the OV pin
exceeds 2.5 V, an overvoltage condition is detected and
GATE shuts down. An internal 12.5 mA current source turns
on and feeds current into the external resistor, R
a hysteresis determined by the value of this resistor (the
higher the value, the greater the hysteresis). The hysteresis
voltage of the OV monitor is determined by the following
formula:
S
Current Reduces When a Small Capacitor Is Used.
DC−DC converters with current mode control require a
It should be noted that internal capacitance of the IC will
Two independent comparators monitor OV and UV
is charged by an internal 53 mA current source and is
60
55
50
45
40
35
30
25
20
Figure 4. The Slope Compensation Pin Charge
S
, but increases as C
10
S
V OV(HYST) + 12.5 mA
. This error is typically small for large values
dV SLOPE
dt
Compensation Cap (pF)
S
I(SENSE)
becomes small and comparable to
+ 0.1
CS51021A, CS51022A, CS51023A, CS51024A
100
S
.Figure 4 shows a typical
. The signal applied to the
53 mA
C S
R 3
SLOPE
3
, creating
/dt
http://onsemi.com
1000
,
is
8
where R
than 1.45 V, GATE shuts down. The UV pin has fixed 75 mV
hysteresis.
capacitor is discharged. This way, every time a fault
condition is detected the controller goes through the power
up sequence.
To calculate the OV?UV resistor divider :
V
ensure that it remains within specifications. The monitor,
which outputs a fault, can be tripped by two methods:
• If the reference voltage drops below 4.75 V
• If V
output to stop switching and begins the discharge of the Soft
Start capacitor C
REF
When the monitored voltage is low and the UV pin is less
Both OV and UV conditions are latched until the Soft Start
The 5.0 V reference voltage is internally monitored to
As indicated in the block diagram, any fault causes the
1. Solve for R
2. Find the total impedance of the divider.
3. Determine the value of R
4. Calculate R
5. The undervoltage hysteresis is given by :
Monitor
where V
overvoltage hysteresis, and V
at which the supply will shut down.
conditions.
where V
will shut down.
CC
3
R TOT + R 1 ) R 2 ) R 3 +
is a resistor connected from the OV pin to ground.
falls below the STOP threshold
V
Figure 5. UV/OV Monitor Divider
IN
V UV(HYST) +
MIN
R 3 +
R 2 +
OV(HYST)
R 1 + R TOT * R 2 * R 3
SS
3
1
, based on OV hysteresis requirements.
.
.
is the UV voltage at which the supply
R
1
V OV(HYST)
1.45
V MAX
V
UV
V MIN
is the desired amount of
R
R TOT
V MIN
2
2
12.5 mA
V
from the UV threshold
1.45
OV
MAX
* R 3
V MAX
2.5 V
0.075
R
is the input voltage
3
2.5
R 3

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