NCP1397ADR2G ON Semiconductor, NCP1397ADR2G Datasheet - Page 23

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NCP1397ADR2G

Manufacturer Part Number
NCP1397ADR2G
Description
IC CTLR RESONANT HI PERF 16-SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP1397ADR2G

Pwm Type
Controller
Number Of Outputs
1
Frequency - Max
560kHz
Duty Cycle
52%
Voltage - Supply
10.3 V ~ 20 V
Buck
No
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
Yes
Operating Temperature
-40°C ~ 125°C
Package / Case
16-SOIC (3.9mm Width, 15 Leads)
Frequency-max
560kHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Skip/Disable
As soon as its voltage exceeds 0.66 V typical, all pulses are
off and maintained off as long as the fault is present. When
the pin is released, pulses come back and the soft−start is
activated (in case the V
feedback pin via a resistive divided and thus implement skip
cycle operation. The resonant converter can be designed to
Figure 46. Skip Cycle Can Be Implemented Via Two
The Skip/Disable input is not affected by a delayed action.
Thanks to the low activation level, this pin can observe the
Resistors on the FB Pin to the Fast Fault Input
Figure 45. A Resistor Can Easily Program the Capacitor Discharge Time
V
Fault is Gone
FB
CC
< 0.3 V).
FB
Skip/Disable
SMPS Stops
http://onsemi.com
Reset at Re−start
23
lose regulation in light load conditions, forcing the FB level
to increase. When it reaches the programmed level, it
triggers the skip input and stops pulses. Then V
drops, the loop reacts by decreasing the feedback level
which, in turn, unlocks the pulses, V
on: we are in skip cycle mode. As the feedback voltage does
not drop below 0.3 V the Soft−Start discharge switch is not
activated in this case. Please refer also to Figure 35 for skip
mode function implementation when optocoupler is
connected directly to Rt pin.
Startup Behavior
consumption is kept below I
V
Mupper. This sequence will always be the same whatever
triggers the pulse delivery: fault, OFF to ON etc… Pulsing
the output M
bootstrap capacitor. Then, the rest of pulses follow,
delivered at the highest switching value, set by the R
resistor in parallel with R
soft−start capacitor ensures a smooth frequency decrease to
either the programmed minimum value (in case of fault) or
to a value corresponding to the operating point if the
feedback loop closes first. Figure 47 shows typical signals
evolution at power on.
CC(on)
When the V
level, output Mlower goes high first and then output
SMPS Re−starts
lower
CC
high first gives an immediate charge of the
voltage increases, the internal current
4 V
1 V
Fmin
strup
. When V
resistor on Pin 4. The
out
goes up again and so
CC
reaches the
out
slowly
Fstart

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