ADP1882ARMZ-0.6-R7 Analog Devices Inc, ADP1882ARMZ-0.6-R7 Datasheet - Page 33

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ADP1882ARMZ-0.6-R7

Manufacturer Part Number
ADP1882ARMZ-0.6-R7
Description
IC PWM BUCK CURRENT MODE 10MSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADP1882ARMZ-0.6-R7

Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Voltage - Supply
2.75 V ~ 20 V
Frequency-max
600kHz
Operating Temperature
-40°C ~ 125°C
Number Of Outputs
1
Duty Cycle
65%
Pwm Type
Current Mode
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Primary Input Voltage
13V
No. Of Outputs
1
Output Current
25A
No. Of Pins
10
Operating Temperature Range
-40°C To +125°C
Msl
MSL 3 - 168 Hours
Peak Reflow Compatible (260 C)
Yes
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
LAYOUT CONSIDERATIONS
The performance of a dc-to-dc converter depends highly on how
the voltage and current paths are configured on the printed
circuit board (PCB). Optimizing the placement of sensitive
analog and power components are essential to minimize output
ripple, maintain tight regulation specifications, and reduce
PWM jitter and electromagnetic interference.
HIGH VOLTAGE INPUT
V
70pF
OUT
C
V
R1 18.75kΩ
F
0.1µF
DD
C2
= 5V
15kΩ
Figure 83. ADP1882 High Current Evaluation Board Schematic (Blue Traces Indicate High Current Paths)
R
38.1kΩ
C
700pF
R2
C
1µF
C
C1
JP1
1
2
3
4
5
VIN
COMP/EN
FB
GND
VDD
ADP1882/
ADP1883
PGND
DRVH
DRVL
BST
SW
10
9
8
7
6
100kΩ
C12
100nF
0Ω
R4
R5
HIGH VOLTAGE INPUT
Rev. 0 | Page 33 of 40
V
Q1
Q3
IN
= 12V
Q2
Q4
22µF
MURATA: (HIGH VOLTAGE INPUT CAPACITORS)
PANASONIC: (OUTPUT CAPACITORS)
INFINEON MOSFETs (NO CONNECTION FOR Q2/Q4:
WURTH INDUCTORS:
C3
22µF, 25V, X7R, 1210 GRM32ER71E226KE15 L
270µF SP-SERIES, 4V, 7mΩ EEFUE0G271LR
BSC042N03MS G (LOWER SIDE)
BSC080N03MS G (UPPER SIDE)
1µH, 3.3mΩ, 20A 7443552100
Figure 83 shows the schematic of a typical ADP1882/ADP1883
used for a high power application. Blue traces denote high current
pathways. VIN, PGND, and V
possibly replicated, descending down into the multiple layers.
Vias should populate, mainly around the positive and negative
terminals of the input and output capacitors, alongside the
source of Q1/Q2, the drain of Q3/Q4, and the inductor.
R6
2Ω
C13
1.5nF
1.0µH
22µF
C4
+
270µF
C14 TO C19
N/A
22µF
C20
C5
+
22µF
270µF
C6
C21
V
22µF
+
OUT
270µF
C7
C22
= 1.8V, 15A
OUT
N/A
+
C8
270µF
C23
traces should be wide and
ADP1882/ADP1883
+
270µF
C24
+

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