MCP1630-E/MS Microchip Technology, MCP1630-E/MS Datasheet - Page 12
![IC PWM HS MCU-ADAPTABLE 8MSOP](/photos/6/59/65932/mfg_150_c04-111_ms_8-msop_sml.jpg)
MCP1630-E/MS
Manufacturer Part Number
MCP1630-E/MS
Description
IC PWM HS MCU-ADAPTABLE 8MSOP
Manufacturer
Microchip Technology
Specifications of MCP1630-E/MS
Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
1MHz
Duty Cycle
75%
Voltage - Supply
3 V ~ 5.5 V
Buck
Yes
Boost
Yes
Flyback
Yes
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
Yes
Operating Temperature
-40°C ~ 125°C
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Frequency-max
1MHz
Input Voltage
5.5V
Frequency
1MHz
Supply Voltage Range
3V To 5.5V
Digital Ic Case Style
MSOP
No. Of Pins
8
Operating Temperature Range
-40°C To +125°C
Termination Type
SMD
Switching Frequency
1 MHz
Mounting Style
SMD/SMT
Filter Terminals
SMD
Rohs Compliant
Yes
Control Mode
Current, Voltage
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP1630DM-LED2 - BOARD DEM MCP1630 BOOST MODE LEDMCP1630RD-NMC1 - REF DESIGN MCP1630 NIMH BATT CHGMCP1630RD-DDBK3 - REF DESIGN MCP1630V BI-DIR 4CELLMCP1630DM-DDBK4 - BOARD CONV DEMO MCP1630 TRPL-OUTMCP1630DM-DDBS2 - BOARD DEMO BOOST COUPLED INDUCTRMCP1630DM-DDBS1 - BOARD DEMO BOOST AUTO INPUTMCP1630DM-NMC1 - BOARD DEMO FOR MCP1630
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
MCP1630/MCP1630V
4.0
4.1
The MCP1630 is comprised of a high-speed compara-
tor, high-bandwidth amplifier and logic gates that can
be combined with a PICmicro MCU to develop an
advanced programmable power supply. The oscillator
and reference voltage inputs are generated by the
PICmicro MCU so that switching frequency, maximum
duty cycle and output voltage are programmable. Refer
to Figure 4-1.
4.2
The V
the output level of the internal high-speed comparator
and the level of the external oscillator. When the oscil-
lator level is high, the PWM output (V
When the external oscillator is low, the PWM output is
determined by the output level of the internal high-
speed comparator. During UVLO, the V
in the low state. During overtemperature operation, the
V
4.3
The beginning of a cycle is defined when OSC IN tran-
sitions from a high state to a low state. For normal oper-
ation, the state of the high-speed comparator output
(R) is low and the Q output of the latch is low. On the
OSC IN high-to-low transition, the S and R inputs to the
high-speed latch are both low and the Q output will
remain unchanged (low). The output of the OR gate
(V
turning on the internal P-channel drive transistor in the
output stage of the PWM. This will change the PWM
output (V
on the power-train external switch and ramping current
in the power-train magnetic device.
The sensed current in the magnetic device is fed into
the CS input (shown as a ramp) and increases linearly.
Once the sensed current ramp (MCP1630) reaches the
same voltage level as 1/3 of the EA output, the compar-
ator output (R) changes states (low-to-high) and resets
the PWM latch. The Q output transitions from a low
state to a high state, turning on the N-channel MOSFET
in the output stage, which turns off the V
external MOSFET driver terminating the duty cycle.
The OSC IN will transition from a low state to a high
state while the V
input ramp had never reached the same level as 1/3 of
the error amplifier output, the low-to-high transition on
OSC IN would terminate the duty cycle and this would
be considered maximum duty cycle. In either case,
while OSC IN is high, the V
off the external power-train switch. The next cycle will
start on the transition of the OSC IN pin from a high
state to a low state.
DS21896B-page 12
EXT
DRIVE
pin is high-impedance (100 k to ground).
EXT
) will transition from a high state to a low state,
DETAILED DESCRIPTION
Device Overview
PWM
Normal Cycle by Cycle Control
EXT
output of the MCP1630/V is determined by
) from a low state to a high state, turning
EXT
pin remains unchanged. If the CS
EXT
drive pin is low, turning
EXT
EXT
EXT
) is forced low.
drive to the
pin is held
For Voltage mode or Average Current mode applica-
tions that utilize a large signal ramp at the CS input, the
MCP1630V is used to provide more signal (2.7V typ.).
The operation of the PWM does not change.
4.4
The internal amplifier is used to create an error output
signal that is determined by the external V
the power supply output fed back into the FB pin. The
error amplifier output is rail-to-rail and clamped by a
precision 2.7V. The output of the error amplifier is then
divided down 3:1 (MCP1630) and connected to the
inverting input of the high-speed comparator. Since the
maximum output of the error amplifier is 2.7V, the max-
imum input to the inverting pin of the high-speed com-
parator is 0.9V. This sets the peak current limit for the
switching power supply.
For the MCP1630V, the maximum error amplifier out-
put is still 2.7V. However, the resistor divider is
removed, raising the maximum input signal level at the
high-speed comparator inverting input (CS) to 2.7V.
As the output load current demand increases, the error
amplifier output increases, causing the inverting input
pin of the high-speed comparator to increase.
Eventually, the output of the error amplifier will hit the
2.7V clamp, limiting the input of the high-speed com-
parator to 0.9V max (MCP1630). Even if the FB input
continues to decrease (calling for more current), the
inverting input is limited to 0.9V. By limiting the inverting
input to 0.9V, the current-sense input (CS) is limited to
0.9V, thus limiting the output current of the power
supply.
For Voltage mode control, the error amplifier output will
increase as input voltage decreases. A voltage ramp is
used instead of sensed inductor current at the CS input
of the MCP1630V. The 3:1 internal error amplifier out-
put resistor divider is removed in the MCP1630V option
to increase the maximum signal level input to 2.7V
(typ.).
4.5
The duty cycle of the V
ing 0% when the FB pin is held higher than the V
(inverting error amplifier). This is accomplished by the
rail-to-rail output capability of the error amplifier and the
offset voltage of the high-speed comparator. The mini-
mum error amplifier output voltage, divided by three, is
less than the offset voltage of the high-speed compar-
ator. In the case where the output voltage of the con-
verter is above the desired regulation point, the FB
input will be above the V
fier will be pulled to the bottom rail (GND). This low
voltage is divided down 3:1 by the 2R and 1R resistor
(MCP1630) and connected to the input of the high-
speed comparator. This voltage will be low enough so
that there is no triggering of the comparator, allowing
narrow pulse widths at V
Error Amp/Comparator Current
Limit Function
0% Duty Cycle Operation
EXT
© 2005 Microchip Technology Inc.
EXT
REF
output is capable of reach-
.
input and the error ampli-
REF
input and
REF
pin