MAX8554EEE+ Maxim Integrated Products, MAX8554EEE+ Datasheet - Page 17
![IC CNTRLR BUCK PWM 16-QSOP](/photos/6/61/66127/175-16-qsop_sml.jpg)
MAX8554EEE+
Manufacturer Part Number
MAX8554EEE+
Description
IC CNTRLR BUCK PWM 16-QSOP
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX8553EEE.pdf
(24 pages)
Specifications of MAX8554EEE+
Pwm Type
Controller
Number Of Outputs
1
Frequency - Max
550kHz
Duty Cycle
95%
Voltage - Supply
4.5 V ~ 28 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
Yes
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 85°C
Package / Case
16-QSOP
Frequency-max
550kHz
Output Voltage
0.6 V to 3.5 V
Output Current
25000 mA
Mounting Style
SMD/SMT
Switching Frequency
550 KHz
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Synchronous Pin
No
Topology
Buck
Dc
0649
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The MAX8553/MAX8554 discharge the output to GND
before the digital soft-start begins. When EN/HSD (EN)
is pulled high, the MAX8553 (MAX8554) starts an inter-
nal counter, and forces V
output to GND through the low-side MOSFET. If the out-
put voltage is above ground before enable, the output
voltage goes slightly negative due to energy stored in
the output LC. If the load cannot tolerate a negative volt-
age, place a power Schottky diode from the output to
PGND (anode to PGND) to act as a reverse-polarity
clamp. The period for this discharge mode is 1.7ms.
Both the buck controller and the VTTR buffer are turned
off during this period. After the predischarge period,
both the buck controller and the VTTR buffer are turned
on and go through soft-start.
The digital soft-start allows a gradual increase of the
internal current-limit level during startup to reduce the
input surge current. The MAX8553/MAX8554 divide the
soft-start period into five phases. During the first phase,
the controller limits the current limit to only 20% of the
full current limit. If the output does not reach the regula-
tion within 425µs, soft-start enters the second phase
and the current limit is increased by another 20%. This
process repeats until the maximum current limit is
reached (after 1.7ms) or when the output reaches the
nominal regulation voltage, whichever occurs first.
Adding a capacitor in parallel with the external ILIM
resistor creates a continuously adjustable analog soft-
start function. If the foldback current-limiting feature is
implemented in the application circuit, the maximum
current limit is also a function of the output voltage and
the resistors connected to ILIM.
POK is the open-drain output of the internal window
comparators that continuously monitor VTT and VTTR
for the MAX8553 and FB for the MAX8554. POK is
actively held low in shutdown, and becomes high
impedance when the outputs are within 12% of their
respective nominal regulation voltage.
4.5V to 28V Input, Synchronous PWM Buck Controllers
for DDR Termination and Point-of-Load Applications
______________________________________________________________________________________
Power-Good Output (POK)
DL
to V
Predischarge Mode
VL
Digital Soft-Start
. This discharges the
When the buck output voltage rises above 120% of the
nominal regulation voltage, the OVP circuit sets the
fault latch, shuts down the PWM controller, and immedi-
ately pulls DH low and forces DL high. The negative
current limit is also disabled. This turns on the low-side
MOSFET, which rapidly discharges the output capaci-
tors and clamps the output to ground. Note that imme-
diately latching DL high can cause the output voltage
to go slightly negative due to energy stored in the out-
put LC at the instant the OVP occurs. If the load cannot
tolerate a negative voltage, place a power Schottky
diode from the output to PGND (anode to PGND) to act
as a reverse-polarity clamp. Cycle EN or input power to
reset the latch.
The current-limit circuit employs a unique “valley” cur-
rent-sensing algorithm that uses the on-resistance of
the low-side MOSFET as a current-sensing element. If
the current-sense signal is above the current-limit
threshold, the PWM is not allowed to initiate a new
cycle. The actual peak current is greater than the cur-
rent-limit threshold by an amount equal to the inductor
ripple current
limit characteristic and maximum load capability are a
function of the MOSFET on-resistance, the inductor
value, and the input voltage. The reward for this uncer-
tainty is robust, lossless overcurrent sensing. There is
also a negative current limit that prevents excessive
reverse inductor currents when V
The negative current-limit threshold is set to approxi-
mately 110% of the positive current limit, and therefore
tracks the positive current limit when ILIM is adjusted.
The current-limit threshold can be adjusted with an
external resistor (R
current source at ILIM sets a voltage drop on this resis-
tor, adjusting the current-limit threshold from approxi-
mately 50mV to 200mV. In the adjustable mode, the
current-limit threshold voltage is precisely 1/10 the volt-
age seen at ILIM. Therefore, choose R
2kΩ/mV of the current-limit threshold. The threshold
defaults to 100mV when ILIM is connected to VL. The
logic threshold for switchover to the 100mV default
value is approximately V
limit can accommodate various MOSFETs. Alternately,
foldback current limit can also be implemented by
adding a resistor from ILIM to V
Current Limit section.
(Figure
Overvoltage Protection (OVP)
ILIM
4). Therefore, the exact current-
) at ILIM. A precision 5µA pullup
VL
Overcurrent Protection
- 1V. The adjustable current
OUT
OUT
. See the Setting the
is sinking current.
ILIM
equal to
17