LT1573IS8 Linear Technology, LT1573IS8 Datasheet - Page 6

• Manufacturer Part Number: LT1573IS8
• Description: IC LDO REGULATOR DVER ADJ 8-SOIC
• Manufacturer: Linear Technology
• Type: Positive Adjustabler

Specifications of LT1573IS8

• Number Of Outputs: 1
• Voltage - Output: 1.27 ~ 6.8 V
• Current - Supply: 1.7mA
• Voltage - Input: 2.8 ~ 10 V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

BLOCK DIAGRA
FU CTIO AL DESCRIPTIO
LT1573
SHDN
The basic block diagram of the LT1573 is shown above.
The regulating loop consists of a 1.265V reference, an
error amplifier, a Darlington driver and an external PNP
pass transistor. The 1.265V reference feeds the noninvert-
ing input of the error amplifier. The error amplifier drives
the Darlington connected transistor pair Q1 and Q2. The
collector of Q1 comes out to the DRIVE pin and is used to
drive the base of an external PNP power transistor as
shown in Figure 1. The error amplifier will adjust the drive
current to the external PNP power transistor to maintain
the feedback pin voltage at 1.265V. The LT1573 provides
overcurrent protection by means of a timed latch function.
Base current to the external PNP transistor is limited by
placing a resistor between the base of the transistor and
the DRIVE pin. When the DRIVE pin drops below V
(the DRIVE pin saturation voltage) the output of the
comparator C2 switches high; S1, which is normally
closed, opens and the external capacitor connected to the
LATCH pin is allowed to charge. Discharge current I
is equal to approximately 28µA and charging current I
is equal to approximately 7µA. If the fault condition goes
6
GND
V
IN
U
4
6
3
V
NORMALLY
SHDNTH
U
C4
OFF
+
–
–
+
V
LATCHTH
C3
+
S4
I
LATCH
SHUTDOWN
THERMAL
W
NORMALLY
+
CAPACITOR
EXTERNAL
C
2
EXT
OFF
LATCH
I
CHRG
S3
+
I
3
Q4
+
U
S2
DISCHRG
+
I
2
DRSAT
NORMALLY
OFF
CHRG
S1
Q3
+
I
DISCHRG
NORMALLY
ON
away before C
switch back low, S1 will close and Q4 will discharge C
If the fault condition persists long enough for C
charge up to the latch threshold (V
C4 will switch high and S4 will close and latch the output
off. The device will stay latched because latching current
I
shutdown circuitry will close S4 and latch the device off
with no timing delay. Comparator C1 is used to override
the latching function during start-up. If the difference
between the output voltage and the input voltage is less
than the input-output differential threshold (V
comparator C1 output goes high which closes S2. Current
source I
charging. Comparator C3 is used for system shutdown
and latch reset. If SHDN pin voltage is higher than shut-
down threshold V
high, shutting down the regulator and closing switch S3.
Current I
latch.
LATCH
DRIVE
is greater than the pull-down current of Q4. Thermal
5
C2
C1
V
2
DRSAT
3
then drives base of Q4 which prevents C
+
–
–
+
will drive Q4 to discharge C
EXT
V
Q1
IODTH
charges to the latch threshold, C2 will
SDTH
Q2
V
OUT
7
, the comparator C3 output goes
V
6
4
IN
Q5
GND
COMP
ERROR
LATCHTH
AMP
8
1.265V
–
+
EXT
FB
, resetting the
1
), comparator
sn1573 1573fas
EXT
R2
R1
FOR FIXED
VOLTAGE
VERSION
IODTH
EXT
from
EXT
1573 BD
to
),
.