ADR435BRZ Analog Devices Inc, ADR435BRZ Datasheet - Page 16

• Manufacturer Part Number: ADR435BRZ
• Description: IC VOLT REF XFET 5.0V 8-SOIC
• Manufacturer: Analog Devices Inc
• Series: XFET®r

Specifications of ADR435BRZ

• Temperature Coefficient: 3ppm/°C
• Design Resources: Converting a Single-Ended Signal with AD7982 Differential PulSAR ADC (CN0032) Converting a Single-Ended Signal with AD7984 Differential PulSAR ADC (CN0033) Parametric Measurement Unit and Supporting Components for PAD Appls Using AD5522 and AD7685 (CN0104) Automated Calibration Technique That Reduces AD5360 Offset Voltage to Less Than 1 mV (CN0123) Integrated Device Power Supply for PAD with Output Voltage Range 0 V to 25 V (CN0130) 16 Channels of Programmable Output Span Using AD5360 (CN0131) 40 Channels of Programmable Output Span Using AD5371 (CN0149) Precision Single-Supply Differential ADC Driver for Industrial-Level Signals (CN0180)
• Reference Type: Series
• Voltage - Output: 5V
• Tolerance: ±0.04%
• Voltage - Input: 7 ~ 18 V
• Number Of Channels: 1
• Current - Quiescent: 800µA
• Current - Output: 30mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Topology: Series
• Input Voltage: 7V To 18V
• Reference Voltage: 5V
• Reference Voltage Tolerance: 2mV
• Voltage Reference Case Style: SOIC
• No. Of Pins: 8
• Fixed / Adjust / Prog: Precision
• Output Voltage (max): 5V
• Reference Voltage Accuracy (max): 0.04
• Line Regulation: 20ppm/V
• Load Regulation: 15ppm/mA
• Input Voltage (max): 20V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 8
• Package Type: SOIC N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Cathode: -
• Lead Free Status / Rohs Status: Compliant

ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
Equation 3 shows that the apparent output impedance is reduced
by approximately the excess loop gain; therefore, as the frequency
increases, the excess loop gain decreases, and the apparent output
impedance increases. A passive element whose impedance
increases as its frequency increases is an inductor. When a
capacitor is added to the output of an op amp or a reference, it
forms a tuned circuit that resonates at a certain frequency and
results in gain peaking. This can be observed by using a model
of a semiperfect op amp with a single-pole response and some
pure resistance in series with the output. Changing capacitive
loads results in peaking at different frequencies. For most normal
op amp applications with low capacitive loading (<100 pF), this
effect is usually not observed.
However, references are used increasingly to drive the reference
input of an ADC that may present a dynamic, switching capacitive
load. Large capacitors, in the microfarad range, are used to reduce
the change in reference voltage to less than one-half LSB. Figure 31
shows the ADR431 noise spectrum with various capacitive values
to 50 µF. With no capacitive load, the noise spectrum is relatively
flat at approximately 60 nV/√Hz to 70 nV/√Hz. With various
values of capacitive loading, the predicted noise peaking
becomes evident.
1000
100
10
10
ADR431
NO COMPENSATION
Figure 31. Noise vs. Capacitive Loading
100
FREQUENCY (Hz)
C
L
C
= 50µF
L
= 10µF
1k
10k
C
L
= 1µF
C
L
= 0µF
100k
Rev. H | Page 16 of 24
The op amp within the ADR43x family uses the classic RC
compensation technique. Monolithic capacitors in an IC are
limited to tens of picofarads. With very large external capacitive
loads, such as 50 µF, it is necessary to overcompensate the op amp.
The internal compensation node is brought out on Pin 7, and
an external series RC network can be added between Pin 7 and
the output, Pin 6, as shown in Figure 32.
The 82 kΩ resistor and 10 nF capacitor can eliminate the noise
peaking (see Figure 33). The COMP pin should be left
unconnected if unused.
TURN-ON TIME
Upon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error band
is defined as the turn-on settling time. Two components normally
associated with this are the time for the active circuits to settle
and the time for the thermal gradients on the chip to stabilize.
Figure 17 and Figure 18 show the turn-on settling time for the
ADR431.
V
NOTES
1. NC = NO CONNECT
2. TP = TEST PIN (DO NOT CONNECT)
IN
10µF
100
10
10
+
RC 82kΩ AND 10nF
Figure 33. Noise with Compensation Network
0.1µF
C
L
Figure 32. Compensated Reference
= 1µF
GND
NC
TP
RC 82kΩ AND 10nF
100
1
2
3
4
FREQUENCY (Hz)
C
(Not to Scale)
L
ADR43x
TOP VIEW
= 10µF
RC 82kΩ AND 10nF
C
L
8
7
6
5
= 50µF
1k
TP
COMP
V
TRIM
OUT
82kΩ
10nF
0.1µF
10k