ADT7461AARMZ-2REEL ON Semiconductor, ADT7461AARMZ-2REEL Datasheet - Page 13

ADT7461AARMZ-2REEL

Manufacturer Part Number

ADT7461AARMZ-2REEL

Description

IC SENSOR TEMP DGTL 2CH 8-MSOP

Manufacturer

ON Semiconductor

Datasheet

1.ADT7461AARMZ.pdf (19 pages)

Specifications of ADT7461AARMZ-2REEL

Function

Temp Monitoring System (Sensor)

Topology

ADC, Comparator, Multiplexer, Register Bank

Sensor Type

External & Internal

Sensing Temperature

0°C ~ 127°C, External Sensor

Output Type

SMBus™

Output Alarm

Yes

Output Fan

Yes

Voltage - Supply

3 V ~ 3.6 V

Operating Temperature

-40°C ~ 125°C

Mounting Type

Surface Mount

Package / Case

8-MSOP, Micro8™, 8-uMAX, 8-uSOP,

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Current page: 13 of 19
Download datasheet (277Kb)

Figure 15. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register

3. When all data bytes have been read or written,

SDATA

SCLK

transmitted over the serial bus in a single read or

write operation is limited only by what the master

and slave devices can handle.

stop conditions are established. In write mode, the

master pulls the data line high during the tenth

clock pulse to assert a stop condition. In read

mode, the master device overrides the

acknowledge bit by pulling the data line high

during the low period before the ninth clock pulse.

This is known as no acknowledge. The master

takes the data line low during the low period

before the tenth clock pulse, then high during the

tenth clock pulse to assert a stop condition.

Any number of bytes of data are transferable over

the serial bus in one operation, but it is not

possible to mix read and write in one operation

because the type of operation is determined at the

SDATA

SCLK

START BY

MASTER

SDATA

SCLK

START BY

MASTER

START BY

MASTER

Figure 17. Reading from a Previously Selected Register

Figure 16. Writing to the Address Pointer Register Only

SERIAL BUS ADDRESS BYTE

FRAME 1

SDATA (CONTINUED)

SCLK (CONTINUED)

http://onsemi.com

R/W

ADT7461A

ACK. BY

ADT7461A

ACK. BY

data from it, the address pointer register must be set so that

the correct data register is addressed. The first byte of a write

operation always contains a valid address that is stored in the

address pointer register. If data is to be written to the device,

the write operation contains a second data byte that is written

to the register selected by the address pointer register.

address is sent over the bus followed by R/W set to 0. This

is followed by two data bytes. The first data byte is the

address of the internal data register to be written to, which

is stored in the address pointer register. The second data byte

is the data to be written to the internal data register.

To write data to one of the device data registers, or to read

This procedure is illustrated in Figure 15. The device

beginning and cannot subsequently be changed

without starting a new operation. For the

ADT7461A, write operations contain either one or

two bytes, while read operations contain one byte.

ADDRESS POINTER REGISTER BYTE

DATA BYTE

FRAME 3

FRAME 2

ADT7461A

ACK. BY

ADT7461A

ACK. BY

ADT7461A

ACK. BY

STOP BY

MASTER

STOP BY

MASTER

STOP BY

MASTER

ADT7461AARMZ-2REEL ON Semiconductor, ADT7461AARMZ-2REEL Datasheet - Page 13

ADT7461AARMZ-2REEL

Specifications of ADT7461AARMZ-2REEL

Related parts for ADT7461AARMZ-2REEL