ADT7462ACPZ-REEL7 ON Semiconductor, ADT7462ACPZ-REEL7 Datasheet - Page 46
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ADT7462ACPZ-REEL7
Manufacturer Part Number
ADT7462ACPZ-REEL7
Description
IC TEMP/VOLT MONITOR 32-LFCSP
Manufacturer
ON Semiconductor
Datasheet
1.ADT7462ACPZ-5RL7.pdf
(81 pages)
Specifications of ADT7462ACPZ-REEL7
Function
Fan Control, Temp Monitor
Topology
ADC, Comparator, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 125°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
32-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Approaches to System Acoustic Enhancement
system acoustic enhancement: temperature−centric and
fan−centric.
transient temperatures as they are measured by a
temperature source (for example, Remote 1 temperature).
The temperature values used to calculate the PWM duty
cycle values are smoothed, reducing fan speed variation.
However, this approach causes an inherent delay in updating
fan speed and causes the thermal characteristics of the
system to change. It also causes the system fans to stay on
longer than necessary, because the fan’s reaction is merely
delayed. The user has no control over noise from different
fans driven by the same temperature source. Consider, for
example, a system in which control of a CPU cooler fan (on
PWM1) and a chassis fan (on PWM2) uses Remote 1
temperature. Because the Remote 1 temperature is
smoothed, both fans are updated at exactly the same rate. If
the chassis fan is much louder than the CPU fan, there is no
way to improve its acoustics without changing the thermal
solution of the CPU cooling fan.
enhancement controls the PWM duty cycle, driving the fan
at a fixed rate (for example, 6%). Each time the PWM duty
cycle is updated, it is incremented by a fixed 6%. As a result,
the fan ramps smoothly to its newly calculated speed. If the
temperature starts to drop, the PWM duty cycle immediately
decreases by 6% at every update. Therefore, the fan ramps
smoothly up or down without inherent system delay.
fan (on PWM1) and chassis fan (on PWM2) using Remote
1 temperature. The T
been defined in automatic fan speed control mode; that is,
thermal characterization of the control loop has been
optimized. The chassis fan is noisier than the CPU cooling
fan. Using the fan−centric approach, PWM2 can be placed
into acoustic enhancement mode independently of PWM1.
The acoustics of the chassis fan can, therefore, be adjusted
without affecting the acoustic behavior of the CPU cooling
fan, even though both fans are controlled by Remote 1
temperature. The fan−centric approach is how acoustic
enhancement works on the ADT7462.
Enabling Acoustic Enhancement for Each PWM
Output
Enhanced Acoustics Register 1 (0x1A)
Bit 0 (En1) = 1 enables acoustic enhancement on PWM1
output.
Bit 1 (En2) = 1 enables acoustic enhancement on PWM2
output.
Enhanced Acoustics Register 2 (0x1B)
Bit 0 (En3) = 1 enables acoustic enhancement on PWM3
output.
Bit 1 (En4) = 1 enables acoustic enhancement on PWM4
output.
There are two different approaches to implementing
The temperature−centric approach involves smoothing
The
Consider, for example, controlling the same CPU cooler
fan−centric
MIN
approach
and T
RANGE
to
settings have already
system
acoustic
http://onsemi.com
46
Effect of Ramp Rate on Enhanced Acoustic Mode
the PWM drive frequency, f, because t = 1/f. For a given
PWM period, t, the PWM period is subdivided into 255
equal time slots. One time slot corresponds to the smallest
possible increment in the PWM duty cycle. A PWM signal
of 33% duty cycle is, therefore, high for 1/3 × 255 time slots
and low for 2/3 × 255 time slots. Therefore, a 33% PWM
duty cycle corresponds to a signal that is high for 85 time
slots and low for 170 time slots.
selectable from 1 to 8. The ramp rates are discrete time slots.
For example, if the ramp rate is 8, then eight time slots are
added to the PWM high duty cycle each time the PWM duty
cycle needs to be increased. If the PWM duty cycle value
needs to be decreased, it is decreased by eight time slots.
Figure 76 shows how the enhanced acoustics mode
algorithm operates.
PWM duty cycle based on the temperature measured. If the
new PWM duty cycle value is greater than the previous
PWM value, the previous PWM duty cycle value is
incremented by either 1, 2, 3, 5, 8, 12, 24, or 48 time slots,
depending on the settings of the enhanced acoustics
registers. If the new PWM duty cycle value is less than the
previous PWM value, the previous PWM duty cycle is
decremented by 1, 2, 3, 5, 8, 12, 24, or 48 time slots. Each
time the PWM duty cycle is incremented or decremented, its
value is stored as the previous PWM duty cycle for the next
comparison.
PWM_OUT
The PWM signal driving the fan has a period, t, given by
The ramp rates in the enhanced acoustics mode are
The enhanced acoustics mode algorithm calculates a new
33% DUTY
Figure 76. Enhanced Acoustics Mode Algorithm
Figure 75. 33% PWM Duty Cycle Represented in
CYCLE
TIME SLOTS
85
TEMPERATURE
BY RAMP RATE
DUTY CYCLE
IS NEW PWM
CALCULATE
PWM VALUE
INCREMENT
= 255 TIME SLOTS
NEW PWM
PREVIOUS
PREVIOUS
Time Slots
VALUE >
VALUE?
PWM OUTPUT
(ONE PERIOD)
READ
YES
TIME SLOTS
170
NO
BY RAMP RATE
DECREMENT
PWM VALUE
PREVIOUS