ADM1033ARQZ-REEL7 ON Semiconductor, ADM1033ARQZ-REEL7 Datasheet - Page 18

• Manufacturer Part Number: ADM1033ARQZ-REEL7
• Description: IC THERM/FAN SPEED CTRLR 16-QSOP
• Manufacturer: ON Semiconductor

Specifications of ADM1033ARQZ-REEL7

• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Interrupt Masking Register
0x09, and 0x0A. These allow individual interrupt sources to
be masked out to prevent the SMBusALERT interrupts.
Masking
SMBusALERT from being asserted; the appropriate status bit
is still set as normal.
Table 16. Mask Register 1 (Reg. 0x08)
Table 17. Mask Register 2 (Reg. 0x09)
HIGH LIMIT
TEMPERATURE
STATUS BIT
SMBusALERT
Mask Registers 1, 2, and 3 are located at Addresses 0x08,
Bit #
Bit #
”STICKY”
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Name
Name
Figure 31. Handling SMBusALERT
the
R1H
R1D
R1L
Res
Res
Res
Res
Res
Res
Res
Res
T%
LH
TS
LL
TA
interrupt
1 masks the ALERT for the local high
temperature.
1 masks the ALERT for the local low
temperature.
1 masks the ALERT for the Remote 1
high temperature.
1 masks the ALERT for the Remote 1 low
temperature.
1 masks the ALERT for the Remote 1
diode errors.
Reserved.
Reserved.
Reserved.
Reserved.
Reserved.
Reserved.
1 masks the ALERT for the THERM %
on−time limit.
1 masks the ALERT for the THERM limit
being exceeded and the THERM output
signal being asserted.
1 masks the ALERT for the THERM state;
has no effect on ALERT in ALERT comp
mode.
Reserved.
Reserved.
TEMP BACK IN LIMIT
(STATUS BIT STAYS SET)
source
INTERRUPT
MASK BIT SET
Description
Description
(SMBusALERT REARMED)
prevents
INTERRUPT MASK BIT
(TEMP BELOW LIMIT)
CLEARED ON READ
CLEARED
only
http://onsemi.com
the
18
FAN_FAULT Output
fans stall. Pin 8, the FAN_FAULT output, is a dual−function
pin. It defaults to being a FAN_FAULT output but can be
reconfigured as an analog input reference for the THERM
input. To do this, set the FAN_FAULT/REF (Bit 7) in
Configuration Register 4 (Address 0x04) to 1.
Fault Queue
that lets the user program the number of out−of−limit
measurements allowable before generating an ALERT. The
fault queue affects only temperature measurement channels
and is only operational in SMBusALERT mode. It performs
some simple filtering, which is particularly useful at the
higher conversion rates (16, 32, and 64 conversions per
second), where averaging is not carried out.
L (the number programmed to the fault queue) or more
consecutive out−of−limit readings are made on the same
temperature channel, the fault queue fills, and the
SMBusALERT output triggers. To fill the fault queue, one
needs L or more consecutive out of limits on the internal
temperature channel; L or more consecutive out−of−limits
on the external 1 temperature channel; or L or more
consecutive out−of−limits on the external 2 temperature
channel. The fault queue is independent of the state of the
bits in the ALERT status registers.
To reset the fault queue, do one of the following:
•
•
•
caused the SMBusALERT remains. The SMBusALERT is
reasserted if the fault queue fills up.
Table 18. Mask Register 3 (Reg. 0x0A)
Table 19. Fault Queue Address 0x06
Bit #
The FAN_FAULT output signals when one or both of the
The ADM1033 has a programmable fault queue option
There is a queue for each of the temperature channels. If
The SMBusALERT clears, even if the condition that
SMBus ARA Command
Read Status Register 1
Power−On Reset
7
6
5
4
3
2
1
0
Bits <3:0>
Name
F1S
Res
Res
Res
Res
Res
Res
FA
1XXX
01XX
000X
001X
1 mask the ALERT for Fan 1 stalling
1 mask the ALERT for fans at ALARM speed
Reserved.
Reserved.
Reserved.
Reserved.
Reserved.
Reserved.
Description
Fault Queue
1
2
3
4