MAX6649MUA+T Maxim Integrated Products, MAX6649MUA+T Datasheet - Page 8

• Manufacturer Part Number: MAX6649MUA+T
• Description: IC SENSOR REMOTE SMBUS 8UMAX
• Manufacturer: Maxim Integrated Products

Specifications of MAX6649MUA+T

• Function: Temp Monitoring System (Sensor)
• Topology: ADC, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -55°C ~ 125°C, External Sensor
• Output Type: I²C™/SMBus™
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Full Temp Accuracy: +/- 3 C, +/- 3.2 C
• Digital Output - Bus Interface: Serial (2-Wire)
• Digital Output - Number Of Bits: 11 bit
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Four registers store ALERT threshold values—one high-
temperature (T
register each for the local and remote channels. If either
measured temperature equals or exceeds the corre-
sponding ALERT threshold value, the ALERT interrupt
asserts.
The MAX6646/MAX6647 local (internal) ALERT T
register POR state is 0101 0101, or +85°C, while the
remote (external) ALERT T
0101 1111, or +95°C.The MAX6649 POR state of both
ALERT T
state of the local and remote T
devices is 0000 0000, or 0°C.
Two additional registers store remote and local alarm
threshold data corresponding to the OVERT output. The
values stored in these registers are high-temperature
thresholds. If either of the measured temperatures equals
or exceeds the corresponding alarm threshold value, an
OVERT output asserts. The MAX6646/MAX6647 local
(internal) OVERT register POR state is 0101 0101, or
+85°C, while the remote (external) OVERT register POR
state is 0111 1101, or +125°C. The MAX6649 POR state
of both OVERT registers is 0101 0101, or +85°C.
A continuity fault detector at DXP detects an open cir-
cuit between DXP and DXN, or a DXP short to V
GND, or DXN. If an open or short circuit exists, the
external temperature register is loaded with 1111 1111.
If the fault is an open-circuit fault bit 2 (OPEN), the sta-
tus byte is set to 1. In the MAX6649, ALERT is activated
at the end of the conversion. Immediately after POR,
the status register indicates that no fault is present. If a
fault is present upon power-up, the fault is not indicated
until the end of the first conversion.
+145°C Precision SMBus-Compatible Remote/
Local Sensors with Overtemperature Alarms
Figure 3. SMBus Read Timing Diagram
8
_______________________________________________________________________________________
SMBCLK
SMBDATA
HIGH
A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVE
E = SLAVE PULLS SMBDATA LINE LOW
registers is 0101 0101, or +85°C. The POR
t
HIGH
SU:STA
A
) and one low-temperature (T
t
HD:STA
Alarm Threshold Registers
t
LOW
HIGH
B
t
HIGH
Diode Fault Alarm
register POR state is
LOW
t
SU:DAT
registers for all
C
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO MASTER
H = LSB OF DATA CLOCKED INTO MASTER
I = MASTER PULLS DATA LINE LOW
D
LOW
HIGH
CC
)
,
E
F
The ALERT interrupt occurs when the internal or external
temperature reading exceeds a high- or low-temperature
limit (programmed) or in the MAX6649, when the remote
diode is disconnected (for continuity fault detection). The
ALERT interrupt output signal is latched and can be
cleared only by either reading the status register or by
successfully responding to an alert response address. In
both cases, the alert is cleared if the fault condition no
longer exists. Asserting ALERT does not halt automatic
conversion. The ALERT output is open drain, allowing
multiple devices to share a common interrupt line.
The MAX6646/MAX6647/MAX6649 respond to the
SMBus alert response address, an interrupt pointer
return-address feature (see the Alert Response
Address section). Prior to taking corrective action,
always check to ensure that an interrupt is valid by
reading the current temperature.
In some systems, it may be desirable to ignore a single
temperature measurement that falls outside the ALERT
limits. Bits 1 and 2 of the fault queue register (address
22h) determine the number of consecutive temperature
faults necessary to set ALERT (see Tables 3 and 4).
The SMBus alert response interrupt pointer provides
quick fault identification for simple slave devices that
lack the complex, expensive logic needed to be a bus
master. Upon receiving an ALERT interrupt signal, the
host master can broadcast a receive byte transmission
to the alert response slave address (0001 100).
Following such a broadcast, any slave device that gen-
erated an interrupt attempts to identify itself by putting
its own address on the bus.
t
HD:DAT
G
H
J = ACKNOWLEDGE CLOCKED INTO SLAVE
K = ACKNOWLEDGE CLOCK PULSE
L = STOP CONDITION
M = NEW START CONDITION
I
Alert Response Address
J K
Fault Queue Register
ALERT Interrupts
t
SU:STO
L
t
BUF
M