ADT7461ARMZ-002 ON Semiconductor, ADT7461ARMZ-002 Datasheet - Page 3

• Manufacturer Part Number: ADT7461ARMZ-002
• Description: IC TEMP MONITOR +/-1C DUAL 8MSOP
• Manufacturer: ON Semiconductor

Specifications of ADT7461ARMZ-002

• Function: Temp Monitoring System (Sensor)
• Topology: ADC, Comparator, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: 0°C ~ 127°C, External Sensor
• Output Type: SMBus™
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 120°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Full Temp Accuracy: +/- 1 C, +/- 3 C
• Digital Output - Bus Interface: Serial (2-Wire)
• Maximum Operating Temperature: + 127 C
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. Guaranteed by design, but not production tested.
2. Time from 10% of SDATA to 90% of SCLK.
3. Time for 10% or 90% of SDATA to 10% of SCLK.
4. Time for 90% of SCLK to 10% of SDATA.
PIN ASSIGNMENT
SMBus TIMING SPECIFICATIONS
Pin No.
t
t
t
HD; STA
SU; DAT
SU; STO
1
2
3
4
5
6
7
8
Parameter
SDATA
t
t
SCLK
HD; DAT
SU; STA
f
t
t
SCLK
t
HIGH
LOW
BUF
t
t
R
F
(Note 2)
(Note 3)
(Note 4)
ALERT/THERM2
STOP START
Mnemonic
t
THERM
SDATA
BUF
SCLK
GND
V
D+
D−
DD
Limit at T
t
t
LOW
HD;STA
MIN
400
300
300
600
600
100
300
600
1.3
0.6
1.3
Positive Supply, 3.0 V to 5.5 V.
Positive Connection to Remote Temperature Sensor.
Negative Connection to Remote Temperature Sensor.
Open−drain output that can be used to turn a fan on/off or throttle a CPU clock in the event of an
overtemperature condition. Requires pullup to V
Supply Ground Connection.
Open−Drain Logic Output Used as Interrupt or SMBus Alert. This may also be configured as a
second THERM output. Requires pullup resistor.
Logic Input/Output, SMBus Serial Data. Open−drain output. Requires pullup resistor.
Logic Input, SMBus Serial Clock. Requires pullup resistor.
t
HD;DAT
and T
(Note 1)
t
R
MAX
Figure 2. Serial Bus Timing
t
F
t
HIGH
kHz max
http://onsemi.com
ns max
ns max
ms min
ms min
ns min
ns min
ns min
ns min
ns min
ms min
t
SU;DAT
Unit
3
−
Clock low period, between 10% points.
Clock high period, between 90% points.
Clock/data rise time.
Clock/data fall time.
Start condition setup time.
Start condition hold time.
Data setup time.
Data hold time.
Stop condition setup time.
Bus free time between stop and start conditions.
Description
START
DD
t
.
SU;STA
t
HD;STA
Description
t
SU;STO
STOP