LM96080CIMT/NOPB National Semiconductor, LM96080CIMT/NOPB Datasheet - Page 23
![IC HARDWARE MONITOR 24-TSSOP](/photos/6/60/66088/pkg_mtc24_sml.jpg)
LM96080CIMT/NOPB
Manufacturer Part Number
LM96080CIMT/NOPB
Description
IC HARDWARE MONITOR 24-TSSOP
Manufacturer
National Semiconductor
Series
PowerWise®r
Datasheet
1.LM96080CIMTNOPB.pdf
(30 pages)
Specifications of LM96080CIMT/NOPB
Function
Hardware Monitor
Topology
ADC (Sigma Delta), Comparator, Fan Speed Counter, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 125°C, External Sensor
Output Type
I²C™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LM96080CIM
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LM96080CIMT/NOPB
Manufacturer:
National Semiconductor
Quantity:
135
Company:
Part Number:
LM96080CIMT/NOPB
Manufacturer:
NS
Quantity:
175
Bit
Bit
Bit
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
12.4 Interrupt Status Register 1—Address 01h
Power on default <7:0> = 0000 0000 binary
12.5 Interrupt Status Register 2—Address 02h
Power on default <7:0> = 0000 0000 binary
12.6 Interrupt Mask Register 1—Address 03h
Power on default <7:0> = 0000 0000 binary
IN0
IN1
IN2
IN3
IN4
IN5
IN6
INT_IN
Hot Temperature
BTI
FAN1
FAN2
GPI (Chassis
Intrusion)
OS bit
Reserved
Reserved
IN0
IN1
IN2
IN3
IN4
IN5
IN6
INT_IN
Name
Name
Name
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read/Write A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write A one disables the corresponding interrupt status bit for INT interrupt.
Read/Write
Read/Write
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read/Write
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A one indicates that a Low has been detected on the INT_IN.
A one indicates a High or Low limit has been exceeded. Only “One-Time Interrupt” and
“Default Interrupt” modes are supported (see Sections 8.2 and 8.2). The mode is set by bit-6
of the Interrupt Mask Register 2 (address 04h).
A one indicates that an interrupt has occurred from the Board Temperature Interrupt (BTI)
input pin. BTI can be tied to the OS output of multiple LM75 chips.
A one indicates that a fan count limit has been exceeded.
A one indicates that a fan count limit has been exceeded.
A one indicates GPI (Chassis Intrusion) has gone high.
A one indicates a High or a Low OS Temperature limit has been exceed. Only “One-Time
Interrupt” and “Default Interrupt” modes are supported (see Sections 8.2 and 9.2). The mode
is set by bit 7 of the Interrupt Mask Register 2.
23
Description
Description
Description
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