MAX6681MEE+ Maxim Integrated Products, MAX6681MEE+ Datasheet - Page 11

IC TEMP SENSOR SMBUS 16-QSOP

MAX6681MEE+

Manufacturer Part Number
MAX6681MEE+
Description
IC TEMP SENSOR SMBUS 16-QSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX6681MEE+

Function
Thermometer, Thermostat
Topology
ADC, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-55°C ~ 125°C, External Sensor
Output Type
I²C™/SMBus™
Output Alarm
Yes
Output Fan
Yes
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-QSOP
Full Temp Accuracy
+/- 5 C, +/- 3 C
Digital Output - Bus Interface
Serial (2-Wire)
Digital Output - Number Of Bits
10 bit + Sign
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 55 C
Ic Output Type
Digital
Sensing Accuracy Range
± 1°C
Supply Current
550µA
Supply Voltage Range
3V To 5.5V
Resolution (bits)
11bit
Sensor Case Style
QSOP
No. Of Pins
16
Accuracy %
1°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 4. SMBus Write Timing Diagram
Figure 5. SMBus Read Timing Diagram
ture returns within the limits. An open diode also sets
this output.
The SMBus Alert Response interrupt pointer provides
quick fault identification for simple slave devices that
lack the complex, expensive logic needed to be a bus
master. Upon receiving an ALERT interrupt signal, the
host master can broadcast a Receive Byte transmission
to the Alert Response slave address (see the Slave
SMBCLK
SMBDATA
SMBCLK
SMBDATA
A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVE
E = SLAVE PULLS SMBDATA LINE LOW
A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVE
E = SLAVE PULLS SMBDATA LINE LOW
t
SU:STA
t
SU:STA
A
±1°C Fail-Safe Remote/Local Temperature
A
t
HD:STA
t
HD:STA
______________________________________________________________________________________
t
LOW
t
LOW
Alert Response Address
B
B
t
HIGH
t
HIGH
t
SU:DAT
t
SU:DAT
C
C
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO MASTER
H = LSB OF DATA CLOCKED INTO MASTER
I = MASTER PULLS DATA LINE LOW
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO SLAVE
H = LSB OF DATA CLOCKED INTO SLAVE
I = MASTER PULLS DATA LINE LOW
Sensors with SMBus Interface
D
D
E
E
F
F
Addresses section). Then, any slave device that gener-
ated an interrupt, attempts to identify itself by putting its
own address on the bus (Table 4).
The Alert Response can activate several different slave
devices simultaneously, similar to the I
If more than one slave attempts to respond, bus arbitra-
tion rules apply, and the device with the lower address
code wins. The losing device does not generate an
acknowledge and continues to hold the ALERT line low
until cleared. (The conditions for clearing an alert vary
t
HD:DAT
t
HD:DAT
G
G
H
H
J = ACKNOWLEDGE CLOCKED INTO SLAVE
K = ACKNOWLEDGE CLOCK PULSE
L = STOP CONDITION
M = NEW START CONDITION
J = ACKNOWLEDGE CLOCKED INTO SLAVE
K = ACKNOWLEDGE CLOCK PULSE
L = STOP CONDITION
M = NEW START CONDITION
I
I
J
J
K
K
2
C General Call.
t
SU:STO
t
SU:STO
L
L
t
BUF
t
BUF
M
M
11

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