LTC2925CUF Linear Technology, LTC2925CUF Datasheet - Page 10

• Manufacturer Part Number: LTC2925CUF
• Description: IC POWER SUPPLY CONTROLLER 24QFN
• Manufacturer: Linear Technology

Specifications of LTC2925CUF

• Applications: Power Supply Controller
• Voltage - Supply: 2.9 V ~ 5.5 V
• Current - Supply: 1.5mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Voltage - Input: -

LTC2925
APPLICATIONS INFORMATION
Optional External FET
Figure 7 illustrates how an optional external N-channel
FET can ramp up a single supply that becomes the mas-
ter signal. When used, the FET’s gate is tied to the GATE
pin and its source is tied to the RAMP pin. Under normal
operation, the GATE pin sources or sinks 10μA to ramp
the FET’s gate up or down at a rate set by the external
capacitor connected to the GATE pin.
The series FET easily controls any supply with an output
voltage between 0V and V
section for examples.
Electronic Circuit Breaker
The LTC2925 features an electronic circuit breaker function
that protects the optional series FET against short circuits.
An external sense resistor is used to measure the current
fl owing in the FET. If the voltage across the sense resistor
exceeds 50mV for more than a short-circuit timer cycle, the
gate of the FET is pulled low with 20mA, turning it off.
10
R
R
V
R
TB1
TA1
IN
TA2
V
V
IN
IN
10k
10k
R
R
R
R
R
ONB
ONA
TB2
Figure 7. Typical Application with External FET
TB3
TA3
0.1μF
ON
REMOTE
STATUS
FAULT
RAMPBUF
TRACK1
TRACK2
TRACK3
V
GND
CC
SENSEP SENSEN
SCTMR
R
C
SENSE
SCTMR
LTC2925
SDTMR
10Ω
CC
C
SDTMR
GATE
Q1
. See the Typical Applications
PGTMR
C
GATE
C
PGTMR
RAMP
SD1
SD3
SD2
FB1
FB2
FB3
PGI
MASTER
R
R
R
2925 F07
RST
RUN/SS
FB = 1.235V
RUN/SS
FB = 0.8V
RUN/SS
FB = 0.8V
FA1
FA2
FA3
MONITOR
SUPPLY
DC/DC
DC/DC
DC/DC
R
R
R
FB1
FB3
FB2
3.3V
3.3V
3.3V
IN
OUT
IN
OUT
IN
OUT
1.8V
SLAVE1
2.5V
SLAVE2
1.5V
SLAVE3
The short-circuit timer duration is confi gured by a capaci-
tor tied between SCTMR and GND. SCTMR will pull up
with 50μA when SENSEP – SENSEN > 50mV. Otherwise, it
pulls down with 2μA. When the voltage at SCTMR exceeds
1.23V, the GATE will be pulled to ground with 20mA and the
FAULT pin will be pulled low. Thus, the capacitor, C
required to confi gure the short-circuit timer duration,
t
Because the slave supplies track the RAMP pin which is
driven by the external FET, they are pulled low by the track-
ing circuit when a short-circuit fault occurs. Following a
short-circuit fault, the FET is latched off and FAULT is pulled
low until the fault is cleared by pulling the ON pin below
0.4V. Note that the supplies will not be allowed to ramp up
again until SCTMR has been pulled below about 100mV by
the 2μA pull-down current source. The electronic circuit
breaker supports any supply voltage between 0V and V
Although it is normally used to monitor current through
the optional series FET, it is capable of monitoring other
currents, including the current from a slave supply. The
Typical Applications section shows one such example.
If the electronic circuit breaker is not used, tie SENSEP
and SENSEN to V
Power Good Timeout
The power good timeout circuit turns off the supplies if an
external supply monitor, connected to the PGI pin, fails to
indicate that all supplies have entered regulation in time
after power up begins. After power up is complete, it turns
off the supplies if any supply exits regulation.
The power good timer duration is confi gured by a capaci-
tor tied between PGTMR and GND. PGTMR will pull up
the CPGTMR capacitor with 10μA starting when the ON
pin is driven above 1.23V. Once the voltage at the PGTMR
exceeds 1.23V, a fault will trip if the PGI pin is low. When
the power good timeout circuit detects a fault, the GATE
SCTMR
C
SCTMR
is determined from:
=
50
μ •
CC
A t
1 23
.
and SCTMR to GND.
SCTMR
V
SCTMR
2925fc
CC
,
.