IR3084UMPBF International Rectifier, IR3084UMPBF Datasheet - Page 34

• Manufacturer Part Number: IR3084UMPBF
• Description: IC XPHASE CONTROL 28-MLPQ
• Manufacturer: International Rectifier
• Series: XPhase™r

Specifications of IR3084UMPBF

• Applications: Processor
• Current - Supply: 14mA
• Voltage - Supply: 9.5 V ~ 16 V
• Operating Temperature: 0°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 28-MLPQ
• Package: 28-Lead MLPQ
• Circuit: X-Phase Control IC
• Switch Freq (khz): 150kHz to 1.0MHz
• Pbf: PbF Option Available
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

VOLTAGE LOOP COMPENSATION
The adaptive voltage positioning is used in the computer applications to meet the load line requirements. Like
current mode control, the adaptive voltage positioning loop introduces extra zero to the voltage loop and splits the
double poles of the power stage, which make the voltage loop compensation much easier.
Resistors R
type depends on the capacitors used. For the applications using Electrolytic, Polymer or AL−Polymer capacitors,
Type II compensation shown in Figure 20 (a) is usually adequate. While for the applications with only ceramic
capacitors, Type III compensation shown in Figure 20 (b) is preferred.
Type II Compensation
Determine the compensation at no load, the worst case condition. Choose the crossover frequency fc between
1/10 and 1/5 of the switching frequency per phase. Assume the time constant of the resistor and capacitor across
the output inductors matches that of the inductor, R
Where L
optional and may be needed in some applications to reduce the jitter caused by the high frequency noise. A
ceramic capacitor between 10pF and 220pF is usually enough.
VO+
VDRP
Page 34 of 47
C
R
E
CP
CP
and R
FB
=
=
and R
RFB
RDRP
(2π
10
(a) Type II compensation
CE
V
*
*
O
are the equivalent output inductance and ESR of the output capacitors, respectively. C
DRP
R
*
f
L
C
CP
E
)
1
2
*
are chosen according to Equations (15) and (16), and the selection of compensation
+
*
C
VDAC
(2π
L
FB
FB
E
RCP
E
Figure 20: Voltage Loop Compensation Networks
*
*
C
+
-
CCP1
f
E
C
*
*
EAOUT
C
R
FB
E
CCP
*
*
R
V
CE
PWMRMP
)
EAOUT
2
CP and
C
CP
VO+
VDRP
RFB1
can be determined by Equations (28) and (29).
(b) Type III compensation
RFB
RDRP
CFB
CDRP
VDAC
FB
RCP
+
-
CCP1
EAOUT
CCP
IR3084U
June 1, 2009
EAOUT
(28)
(29)
CP1
is