SRM4010 Microsemi Commercial Components Group, SRM4010 Datasheet - Page 7

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SRM4010

Manufacturer Part Number
SRM4010
Description
DIODE SYNC POWERMOD 40A SMD
Manufacturer
Microsemi Commercial Components Group
Datasheet

Specifications of SRM4010

Applications
Processor
Operating Temperature
-40°C ~ 80°C
Package / Case
SMD 1.83mm x 1.43mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Mounting Type
-
Current - Supply
-
Voltage - Supply
-
External Control Pins
There are 3 external control pins for tailoring the module
operation to the characteristics of the power converter. These
external pins provide maximum flexibility in using the module
in converter with different characteristics
SPD- Module Pin 9
Pin 9 is used to tailor the module’s ability to differentiate
between valid turn on of the Catch MOSFET and ringing that
can occur at light load.
For the module to properly operate there has to be a difference in
the ringing time and the normal turn off transitions from the
primary power switch turning OFF. In some cases it is necessary
to change the resonance behavior of the power converter to
provide more difference between ringing that occurs at light load
conditions and the turn off at higher loads where consistent
triggering of the module synchronous operation is important. This
can be done by adding additional capacitance in parallel with the
catch MOSFET in the module. This is from pins 1 to 6. The
capacitance will reduce the speed of ringing transitions and
provide more difference between turn off transitions from the
primary switch turning OFF and those caused by ringing. Ringing
that does not cross the 4.3 volt to 1.7 volt transition does not
cause the sensing to be triggered.
Pin 9 is normally open. This sets the boundary for normal turn
on at 6nS for the drain voltage to fall from 4.3 volts to 1.7 volts. .
Fall times between the thresholds that are faster than 6nS are
interpreted as valid turn ON’s caused by the primary being
switched off. Transitions slower than 6nS are interpreted as
ringing, which occurs in light load discontinuous operation. In the
light load case, the Catch MOSFET is not turned on.. Biasing pin
9 can change the speed of this threshold. If the controller is not
sensing normal turn off from the primary, biasing Pin 9 to
ground through a resistor can make the controller respond to
faster transitions. If the controller is responding falsely to ringing
in a discontinuous mode or skip cycle operation, the controller
can be made to reject slower ringing by biasing Pin 9 through a
resistor to the +5V REGOUT at Pin 5.
CPDT- Module Pin 8
This pin is used for an external capacitor to tailor the prediction
time for the Catch synchronous rectifier. The external capacitor
connects between pin 8 and SGND. This is the time between the
rise of the Catch Drain voltage and the rise of the Catch Gate
voltage. Typical values of this capacitor are 0 to 47 pF.
Increasing the capacitance increases the prediction time delay.
This time should be made as short as possible without causing
frequent reductions in the enhancement time due to converter
pulse width jitter. It is often useful to start with about 22 pF of
Copyright
2004-02-06
2000
REV. 1
C O L O R A D O D I V I S I O N
800 Hoyt Street, Broomfield, CO. 80020, 303-469-2161, Fax: 303-466-3775
Colorado Division
Microsemi
capacitance on pin 8 for initial debug. This can later be reduced
for more optimal efficiency after the converter is working.
CDLY- Module Pin 7
This pin is used to ensure that the transformer can be reset
during light load operation. To allow reset, the forward drive is
inhibited for a time from the turn on of the Catch MOSFET
Gate. A capacitor to ground sets the time duration where the
forward MOSFET Gate drive is disabled. Increasing the
capacitor increases the hold off time. The proper value of this
capacitor is a function of the amount of time needed to ensure
the transformer is reset. If the time is made too long, it inhibits
enhancement of the forward MOSFET during times when it is
carrying load current. If the time is made too short, there is a
problem with allowing the power transformer to reset properly
during light load operation.
Layout Guidelines
The SRM
SGND is common to the PGND inside the device. SGND should
be kept separate from the PGND unless the PGND
can be made large in area to have small inductance. The SGND is
the intended reference for the external tailoring parts. The
baseplate can be made common with the PGND plane and used to
spread heat. One technique that works well is to have the PGND
plane on the layer immediately under the SRM
the plane around the leads 4, 5, 7, 8 and 9. The plane would
connect to pins 3 and 6. Surface mount parts can then used for the
added parts on 7, 8 and 9.
Care must be given to the resistance of traces on the output
interconnects. It is easy to have trace losses that are equal to or
higher than the conduction losses in the module.
Demo Board
A dedicated fully operational board is available to demonstrate
the operation of the SRM
commercially available PWM controller. The board is designed
to operate at 48v input and 3.3v output levels. The inductor is a
pair of surface mount transformers at a 9:2 turns ratio, which
gives a 10v secondary voltage swing from a 48v input. These
inductors are suitable for low volume sampling and
development. Volume production using optimized planar
inductors with the SRM
efficiency 1% - 2% higher than the demonstration board’s
efficiency.
40A Synchronous Rectifier Module
TM
4010 is designed to simplify the PCB layout. The
TM
TM
4010 will have a typical converter
4010. The board contains a standard
SRM
TM
4010 and flood
TM
4010
Page 7

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