MAX17010ETL+ Maxim Integrated Products, MAX17010ETL+ Datasheet - Page 16

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MAX17010ETL+

Manufacturer Part Number
MAX17010ETL+
Description
IC REG BOOST SW STEPUP 40-TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX17010ETL+

Applications
LCD Monitor, Notebook Display
Current - Supply
50µA
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The largest portions of power dissipation in the step-up
regulator are the internal MOSFET, inductor, and the out-
put diode. If the step-up regulator has 90% efficiency,
about 3% to 5% of the power is lost in the internal
MOSFET, about 3% to 4% in the inductor, and about 1%
in the output diode. The remaining 1% to 3% is distri-
buted among the input and output capacitors and the
PCB traces. If the input power is about 5W, the power
lost in the internal MOSFET is about 150mW to 250mW.
The power dissipated in the op amp depends on its out-
put current, the output voltage, and the supply voltage:
where I
the op amp, and I
the op amp sinks.
In a typical case where the supply voltage is 8.5V, and
the output voltage is 4V with an output source current
of 30mA, the power dissipated is 135mV.
Careful PCB layout is important for proper operation.
Use the following guidelines for good PCB layout:
1) Minimize the area of high-current loops by placing
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
16
the inductor, output diode, and output capacitors
near the input capacitors and near the LX and
PGND pins. The high-current input loop goes from
the positive terminal of the input capacitor to the
inductor, to the IC’s LX pins, out of PGND, and to
the input capacitor’s negative terminal. The high-
current output loop is from the positive terminal of
the input capacitor to the inductor, to the output
diode (D1), to the positive terminal of the output
capacitors, reconnecting between the output-
capacitor and input-capacitor ground terminals.
Connect these loop components with short, wide
connections. Avoid using vias in the high-current
paths. If vias are unavoidable, use many vias in
parallel to reduce resistance and inductance.
______________________________________________________________________________________
PD
VCOM(SOURCE)
SOURCE
PD
SINK
=
I
VCOM(SINK)
VCOM SOURCE
=
PCB Layout and Grounding
I
VCOM SINK
is the output current sourced by
(
(
is the output current that
)
)
×
×
(
Step-Up Regulator
V
V
SUP
VOUT
V
VOUT
Op Amp
)
2) Create a power ground island (PGND) consisting of
3) Place the feedback-voltage-divider resistors as close
4) Place the IN pin and VL pin bypass capacitors as
5) Minimize the length and maximize the width of the
6) Minimize the size of the LX node while keeping it
7) Refer to the MAX17010 evaluation kit for an example
the input- and output-capacitor grounds, PGND pin,
and any charge-pump components. Connect all
these together with short, wide traces or a small
ground plane. Maximizing the width of the power-
ground traces improves efficiency and reduces out-
put-voltage ripple and noise spikes. Create an
analog ground plane (AGND) consisting of the
AGND pin, all the feedback-divider ground connec-
tions, the op-amp-divider ground connections, the
COMP capacitor ground connection, the SUP and
VL bypass-capacitor ground connections, and the
device’s exposed backside pad. Connect the AGND
and PGND islands by connecting the PGND pin
directly to the exposed backside pad. Make no other
connections between these separate ground planes.
to the feedback pin as possible. The divider’s center
trace should be kept short. Placing the resistors far
away causes the FB trace to become an antenna
that can pick up switching noise. Care should be
taken to avoid running the feedback trace near LX or
the switching nodes in the charge pumps.
close to the device as possible. The ground connec-
tions of the IN and VL bypass capacitors should be
connected directly to the AGND pin or the IC’s back-
side pad with a wide trace.
traces between the output capacitors and the load
for best transient responses.
wide and short. Keep the LX node away from the
feedback node and analog ground. Use DC traces
as shield if necessary.
of proper board layout.

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