LTC3557EUF-1#TRPBF Linear Technology, LTC3557EUF-1#TRPBF Datasheet - Page 14

• Manufacturer Part Number: LTC3557EUF-1#TRPBF
• Description: IC USB POWER MANAGE 28-QFN
• Manufacturer: Linear Technology

Specifications of LTC3557EUF-1#TRPBF

• Applications: Handheld/Mobile Devices
• Voltage - Supply: 4.35 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -

LTC3557/LTC3557-1
by the battery via the ideal diodes. The ideal diodes are
fast enough to keep V
recommended output capacitor. The ideal diode consists
of a precision amplifi er that enables an on-chip P-channel
MOSFET whenever the voltage at V
15mV (V
the internal ideal diode is approximately 200mΩ. If this is
suffi cient for the application, then no external components
are necessary. However, if more conductance is needed,
an external P-channel MOSFET can be added from BAT
to V
The GATE pin of the LTC3557/LTC3557-1 drives the gate of
the external P-channel MOSFET for automatic ideal diode
control. The source of the MOSFET should be connected
to V
of driving a 1nF load, the GATE pin can control an external
P-channel MOSFET having extremely low on-resistance.
Using the WALL Pin to Detect the Presence of an
External Power Source
The WALL input pin can be used to identify the presence
of an external power source (particularly one that is not
subject to a fi xed current limit like the USB V
Typically, such a power supply would be a 5V wall adapter
output or the low voltage output of a high voltage buck
regulator (specifi cally, LT3480, LT3481 or LT3505). When
the wall adapter output (or buck regulator output) is con-
nected directly to the WALL pin, and the voltage exceeds
the WALL pin threshold, the USB power path (from V
to V
will be pulled low. In order for the presence of an external
power supply to be acknowledged, both of the following
conditions must be satisfi ed:
1. The WALL pin voltage must exceed approximately
2. The WALL pin voltage must exceed 75mV above the
The input power path (between V
re-enabled and the ACPR pin is pulled high when either
of the following conditions is met:
1. The WALL pin voltage falls to within 25mV of the BAT
OPERATION
14
4.3V.
BAT pin voltage.
pin voltage.
OUT
OUT
OUT
.
) will be disconnected. Furthermore, the ACPR pin
and the drain should be connected to BAT. Capable
FWD
) below the voltage at BAT. The resistance of
OUT
from dropping with just the
OUT
BUS
is approximately
and V
BUS
OUT
input).
) is
BUS
2. The WALL pin voltage falls below 3.2V.
Each of these thresholds is suitably fi ltered in time to
prevent transient glitches on the WALL pin from falsely
triggering an event.
See the Applications Information section for an explanation
of high voltage buck regulator control using the V
Suspend Mode
When ILIM0 is pulled low and ILIM1 is pulled high the
LTC3557/LTC3557-1 enters Suspend mode to comply
with the USB specifi cation. In this mode, the power path
between V
reduce the V
source is available to drive WALL and V
load connected to V
connected to BAT. If an external power source drives WALL
and V
input current can be as high as 200μA.
3.3V Always-On Supply
The LTC3557/LTC3557-1 includes an ultralow quiescent
current low dropout regulator that is always powered. This
LDO can be used to provide power to a system pushbutton
controller or standby microcontroller. Designed to deliver
up to 25mA, the always-on LDO requires a 1μF MLCC
bypass capacitor for compensation. The LDO is powered
from V
than 25mA as V
not used, it should be disabled by connecting it to V
V
An internal undervoltage lockout circuit monitors V
and keeps the input current limit circuitry off until V
rises above the rising UVLO threshold (3.8V) and at least
50mV above V
input current limit if V
V
drawn from the battery via the ideal diode. To minimize the
possibility of oscillation in and out of UVLO when using
resistive input supplies, the input current limit is reduced
as V
BUS
OUT
BUS
. When this happens, system power at V
OUT
Undervoltage Lockout (UVLO)
OUT
drops below 4.45V typical.
such that V
, and therefore will enter dropout at loads less
BUS
BUS
and V
OUT
OUT
input current to 50μA. If no other power
. Hysteresis on the UVLO turns off the
OUT
falls near 3.3V. If the LDO3V3 output is
OUT
OUT
BUS
is supplied through the ideal diodes
is put in a high impedance state to
drops below 3.7V or 50mV below
< V
BUS
, the Suspend mode V
OUT
, the system
OUT
C
will be
pin.
35571fc
OUT
BUS
BUS
BUS
.