NCP1605ADR2G ON Semiconductor, NCP1605ADR2G Datasheet - Page 19

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NCP1605ADR2G

Manufacturer Part Number
NCP1605ADR2G
Description
IC PFC CONTROLLER CCM/DCM 16SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP1605ADR2G

Mode
Continuous Conduction (CCM), Discontinuous Conduction (DCM)
Frequency - Switching
250kHz
Current - Startup
12mA
Voltage - Supply
10 V ~ 20 V
Operating Temperature
0°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Switching Frequency
250 KHz
Maximum Power Dissipation
550 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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portrayed by Figure 55, the MOSFET on time t
controlled by the signal V
block and the Pin 4 ramp as follows:
[I
voltage (V
that is the capacitor connected between Pin 7 and ground
is also a constant. Hence, the power factor correction is
achieved when the
linearly changed into a signal (V
0 and 1 V. (V
PWM section to modulate the MOSFET duty−cycle.
However, like the NCP1601, the NCP1605(A) inserts some
circuitry that processes (V
(V
(V
to the dead−time sensed during the precedent current
cycles, that is, for a proper shaping of the ac line current
(refer to NCP1601 data sheet). This modulation leads to:
V TON +
pin7
Closed When
Output Low
The NCP1605(A) operates in voltage mode. As
The charge current that is sourced by Pin 7
The output of the regulation block (V
TON
REGUL
Figure 55. PWM Circuit and Timing Diagram
V
= 60 mA/V
) that is used in the PWM section instead of
in
) (see Figure 56). (V
Pin4
T @ V REGUL
Figure 53. PFC Boost Converter
REGUL
t 1 ) t 2
is proportional to the output voltage). C
2
I
in
* (V
t 1 +
V
) is the voltage that is injected into the
TON
C
ramp
I
Pin4
ch
C pin7 @ V TON
or : V TON @
(t
L
1
ton
)
PWM Comparator
V
2
+ t
ton
TON
] is constant at a given input
REGUL
I pin7
generated by the regulation
2
)/T
) is modulated in response
REGUL
Turns Off MOSFET
term is constant.
) to form the signal
V
Ramp Voltage
PWM Outtage
ton
t 1 ) t 2
) varying between
T
CONTROL
+ V REGUL
http://onsemi.com
(eq. 2)
(eq. 3)
V
1
) is
pin7
out
is
−> Vton during (t1+t2)
−> 0 V during t3 (dead−time)
−> Vton*(t1+t2)/T in average
19
V
REGUL
The integrator OA1 amplifies the error between V
(V
Hence, the (V
constant. Provided that in addition, (t1) is proportional to
(V
constant. More exactly:
voltage. Hence, the ac line current is properly shaped.
case. This condition is just a particular case of this
functioning where (t
(V
adapts to the conditions and jumps from DCM and CRM
(and vice versa) without power factor degradation and
without discontinuity in the power delivery.
circuit” is “informed” when there is an OVP condition, not
to over−dimension V
OVP sequence would be viewed as a dead−time phase by
the circuit and V
compensate it.
a skip sequence not to over−dimension “V
(refer to Figure 56).
IN1 so that in average, (V
I in + k @ V in
where : k + constant +
IN1
Given the regulation low bandwidth of the PFC systems,
The input current is then proportional to the input
One can note that this analysis is also valid in the CRM
Remark: Like in the NCP1601, the “V
Similarly, the “V
CONTROL
TON
TON
), equation (1) leads to: (I
= V
Figure 56. V
R1
REGUL
) and then (V
Figure 54. Inductor Current in DCM
+
TON
Inductor Current
). That is why the NCP1605 automatically
OA1
TON
timing capacitor
saw−tooth
TON
TON
C1
3
* (t
TON
t
1
= 0), which leads to (t
TON
S1
S2
would inappropriately increase to
V
Processing Circuit
processing circuit” is inhibited for
1
ton
REGUL
in that conditions. Otherwise, an
*(t1+t2)/T) equates V
+ t
120 m @ L @ (V pin2 )
C pin7 @ V REGUL
t
T
2
2
)/T) term is substantially
) are slow varying signals.
in
S3
= k * V
PWM
comparator
t
3
I
+
pk
(high during
dead−time)
REGUL
TON
in
TON
1
), where k is a
REGUL
to PWM latch
DT
+ t
2
” in this case
Time
processing
and
2
.
= T) and
(eq. 4)
SKIP
OFF
OVP

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