A8904SLP Allegro Microsystems Inc, A8904SLP Datasheet - Page 10

• Manufacturer Part Number: A8904SLP
• Description: IC CTRLR/DRVR DC MOTOR 28TSSOP
• Manufacturer: Allegro Microsystems Inc

Specifications of A8904SLP

• Applications: DC Motor Driver, Brushless (BLDC), 3 Phase
• Number Of Outputs: 1
• Current - Output: ±1.4A
• Voltage - Load: 4 V ~ 14 V
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -20°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

contains six states that control the three half-bridge outputs.
Optimized switching from state to state is achieved through the
adaptive commutation circuitry. During any state, one output is
high, one is low and the other is high impedance. The back-EMF
at the high-impedance output is sensed and compared to the
voltage of the centertap and when the two signals are equivalent,
the FCOM signal toggles. A controlled delay is then introduced
before the sequencer commutates into the next state.
sion control of the motor speed while maintaining extremely
low electrical noise emissions. The speed control is realized
through a frequency-locked loop that processes the sensed
back-EMF signals from the stator phases to eventually produce a
TACH signal. The TACH signal is then compared to the desired
programmed speed, to produce an error. The error signal is then
used to linearly control the current through the low-side DMOS
power devices to obtain the correct speed.
user maximum fl exibility and optimization for each application.
An external tachometer signal applied to the SECTOR DATA
input, along with the internal speed reference can be used for
high-precision speed control. As another alternative, the user can
introduce external speed control by driving the FILTER terminal
directly.
reliable start-up. During start-up, a YANK feature allows rapid
transition to the nominal operating condition on the FILTER
terminal. This feature is also available when the external speed
control is used.
BRAKE terminal or through the brake bit in the serial port.
modes of operation, such as motor speed, internal or external
speed control, internal or external speed reference, current limit,
sleep mode, direction, charge current (for blanking pulse), motor
poles, transconductance gain, and various diagnostic outputs.
mable overcurrent limit, thermal shutdown, and undervoltage
shutdown on the logic supply.
n-channel DMOS transistors with a total source plus sink r
of typically 1 . An internal charge pump provides a voltage rail
above the load supply for driving the high-side DMOS gates.
Intrinsic ground clamp and fl yback diodes provide protection
when switching inductive loads. These diodes will also rectify
the motor back-EMF during power-down conditions. If neces-
A8904
Overview of operation. Each electrical revolution
Linear current-mode control is employed to provide preci-
Alternative control schemes can be introduced, giving the
Start-up routines are inherent in the solution to guarantee
Dynamic braking can be introduced by either the external
A serial port allows the user to program various features and
Full device protection is incorporated, including program-
Power outputs. The power outputs of the A8904 are
3-Phase Brushless DC Motor Controller/Driver
Functional Description
DS(on)
sary, a transient voltage supply can be provided, by connecting
an external Schottky power diode or pass FET in series, between
the power source and the load supply (V
effectively isolates the low impedance path through the power
source. A fi lter capacitor is also required to ‘hold up’ the rectifi ed
signal, and is connected between the load supply and ground.
algorithm. The A8904 provides a complete self-contained
back-EMF sensing, start-up and running commutation scheme.
A state machine with six states, (shown in the tables below for
both forward and reverse direction) controls the three half-bridge
outputs. In each state, one output is high (sourcing current), one
low (sinking current), and one is OFF (high impedance or ‘Z’).
Motor back-EMF is sensed at the output that is OFF.
back-EMF is examined at the OFF output by comparing the out-
put voltage to the motor centertap voltage at CENTERTAP. The
motor will then either step forward, step backward or remain
stationary (if in a null-torque position).
the outputs are commutated automatically by the start-up oscil-
lator. When suitable back-EMF signals are detected, the start-up
oscillator is overridden and the corresponding timing clock is
generated, providing synchronous back-EMF commutation. The
start-up oscillator period is determined by
where C
circuit waits for the correct polarity of back-EMF zero crossing
(forward direction)
(reverse direction)
Sequencer State
Sequencer State
Back-EMF sensing motor start-up and running
At start-up, the outputs are always enabled in state 1. The
If the motor does not move during the initial start-up state,
If the motor moves, the back-EMF detection and direction
ST
is the start-up capacitor.
1
2
3
4
5
6
1
6
5
4
3
2
t
CST
= (V
with Back EMF Sensing
CSTH
- V
115 Northeast Cutoff
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Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
OUT
OUT
CSTL
High
High
High
High
Low
Low
Low
Low
Z
Z
Z
Z
) x C
A
A
ST
BB
OUT
OUT
High
High
High
High
/ I
Low
Low
Low
Low
). This FET or diode
Z
Z
Z
Z
ST(charge)
B
B
OUT
OUT
High
High
High
High
Low
Low
Low
Low
Z
Z
Z
Z
C
C
9