A3938SLD Allegro Microsystems Inc, A3938SLD Datasheet - Page 8

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A3938SLD

Manufacturer Part Number
A3938SLD
Description
IC CTRLR MOSFET 3PH 38-TSSOP
Manufacturer
Allegro Microsystems Inc
Datasheet

Specifications of A3938SLD

Applications
DC Motor Controller, Brushless (BLDC), 3 Phase
Number Of Outputs
1
Voltage - Supply
18 V ~ 50 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
38-TSSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Output
-
Voltage - Load
-

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A3938
Synchronous Rectifi cation.
sumption in the external MOSFETs, during the load current
recirculation PWM-off cycle, the A3938 control logic turns
on the appropriate low-side driver only. The reverse body
diode of the power MOSFET conducts only during the dead
time required at each PWM transition, as usual. However,
unlike full synchronous rectifi cation, the opposite high-side
FET’s body diode (not the R
ing current, be self-extinguishing, and not force the motor to
reverse direction.
Dead Time.
have a delay between a high-side or low-side turn-off, and
the next turn-on event. The potential for cross-conduction
occurs with synchronous rectifi cation, direction changes,
PWM, or after a bootstrap capacitor charging cycle. This
dead-time is set via a resistor from the DEAD pin to LCAP
and can be varied from 100 ns to 5.5 μs.
For a nominal case, given:
• 25°C ambient temperature, and
• 5.6 kΩ < R
For predicting worst-case overvoltage and temperature
extremes, use the following equations:
For nominal comparison with I
ambient temperature:
where V
Rather than use R
which activates an internal (I
The choice of power MOSFET and external gate resistance
determines the selection of the dead-time resistor. The dead
time should be made long enough to cover the variation of
the MOSFET capacitance and gate resistor tolerances (both
external and internal to the A3938).
t
dead (nom,ns)
lcap
t
t
dead (min,ns)
dead (max,ns)
= 5 V, V
dead
To prevent cross-conduction, it is required to
< 470 kΩ,
I
dead
= 37 + [(11.9
= 10 + [(6.55
dead
= 63 + [(17.2
be
= (V
= 0.7 V, and R
values near 470 kΩ, set V
lcap
– V
DSON
dead
×
dead
be
×
×
= 10 μA) current source.
) will carry the re-circulat-
) / (R
10
10
10
currents, also at 25°C
int
-3
-3
To reduce power con-
-3
= 500 Ω.
)
)
dead
)
×
×
×
(R
+ R
(R
(R
dead
dead
dead
int
Application Information
Three-Phase Power MOSFET Controller
)
+ 500)]
+ 650)]
dead
+ 350)]
= 0 V,
Decoupling.
current for the gate drive circuit. As the gates are driven
high, they will require current from an external decoupling
capacitor to support the transients. This capacitor should be
placed as close as possible to the VREG pin. The value of the
capacitor should be at least 20 times larger than the bootstrap
capacitor. Additionally, a 1 nF (or larger) ceramic monolithic
capacitor should be connected between LCAP and AGND, as
close to the device pins as possible.
Protection Circuitry.
features:
• Bootstrap Monitor. The bootstrap capacitor is charged
whenever a sink-side MOSFET is on, an Sx output goes low,
or load current recirculates. This happens constantly during
normal operation.
Note: The high side will not be allowed to turn on before the
charging has decayed to less than approximately 9 mA.
• Undervoltage. VREG supplies the low-side gate driver
and the bootstrap charge current. It is critical to ensure that
the voltages are at a proper level before enabling any of the
outputs. The undervoltage circuit is active during power-up
and signals a fault, and also coasts or brakes (depending
on the stored BRKSEL setting) the motor during that time
period, until VREG is greater than approximately 10 V. On
powering down, a fault is signaled and the motor is coasted
or braked, depending on the stored setting for BRKSEL.
• Hall Invalid. Illegal codes for the Hall sensor inputs (0,0,0
or 1,1,1) force a fault and coast the motor. Noisy Hall lines
may cause Hall code errors, and therefore faults. Additional
external pull-up loading and fi ltering may be required in
some systems.
Hint: Use dividers to the VREG terminal, than to the LCAP
terminal, because the VREG terminal has more current
capability.
• Thermal Shutdown. Junction temperatures greater than
165C
• Motor Lead. The A3938 signals a fault if the motor lead
is shorted to ground. A short-to-ground is assumed after a
high- side is turned on and greater than 2 V is measured
between the drain (VBB) and source (Sx) of the high-side
power MOSFET. This fault is cleared at the beginning of
cause the A3938 to signal a fault and coast the motor.
The internal reference VREG supplies
The A3938 has several protection
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
8

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