AMIS30621C6213RG ON Semiconductor, AMIS30621C6213RG Datasheet - Page 24

• Manufacturer Part Number: AMIS30621C6213RG
• Description: IC MOTOR DRIVER/CTLR 20-SOIC
• Manufacturer: ON Semiconductor

Specifications of AMIS30621C6213RG

• Applications: Stepper Motor Driver
• Number Of Outputs: 1
• Current - Output: 800mA
• Voltage - Supply: 6.5 V ~ 29 V
• Operating Temperature: -40°C ~ 165°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Load: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

<UV2> flag is set. In case V
accepts updates of the target position by means of the
reception of SetPosition, SetPositionShort and
GotoSecurePosition commands, only AFTER the
<UV2> flag is cleared by receiving a GetStatus or
GetFullStatus command.
in shutdown state. The <UV2> and <Steploss> flags are
set. In case V
target
SetPosition,
GotoSecurePosition commands, only AFTER the
OTP Register
OTP Memory Structure
The table below shows how the parameters to be stored in the OTP memory are located.
23. Although not stored in the OTP memory the physical status of the hardware address input pins are returned by a read of the OTP contents
24. Note for product version AMIS30621C6217G and AMIS30621C6217RG the Ihold0 bit is programmed to ’1’.
<LOCKBT> are already programmed in the OTP memory at
circuit delivery. They correspond to the calibration of the
circuit and are just documented here as an indication.
set it to ‘1’. Thus only bits having to be at ‘1’ must be zapped.
Zapping of a bit already at ‘1’ is disabled. Each OTP byte
will
SetOTPparam). Once OTP programming is completed,
bit <LOCKBG> can be zapped to disable future zapping,
otherwise any OTP bit at ‘0’ could still be zapped by using
a SetOTPparam command.
the LIN bus in the RAM prior to an OTP Memory
programming is SetMotorParam. This allows for a
Table 17. OTP MEMORY STRUCTURE
Table 18. OTP OVERWRITE PROTECTION
LOCKBT (factory zapped before delivery)
LOCKBG
In Stop mode 1 the motor is put in shutdown state. The
In Stop mode 2 the motor is stopped immediately and put
Parameters stored at address 0x00 and 0x01 and bit
Each OTP bit is at ‘0’ when not zapped. Zapping a bit will
The command used to load the application parameters via
(GetOTPparam).
Address
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
be
position
programmed
BB
> UV1, AMIS−30621 accepts updates of the
SecPos10
Lock Bit
SecPos7
Vmax3
by
OSC3
ADM
Irun3
Bit 7
1
SetPositionShort
means
separately
(Note 23)
SecPos9
SecPos6
BB
Vmax2
(HW2)
OSC2
TSD2
Irun2
Bit 6
of
> UV1, AMIS−30621
the
(see
reception
0x00 to 0x01
0x00 to 0x07
(Note 23)
SecPos8
SecPos5
Vmax1
(HW1)
OSC1
Protected
TSD1
Bit 5
Irun1
Bytes
command
http://onsemi.com
and
of
(Note 23)
SecPos4
Vmax0
(HW0)
OSC0
TSD0
Irun0
Shaft
Bit 4
24
<UV2> and <Steploss> flags are cleared by receiving a
GetStatus or GetFullStatus command.
Important Notes:
•
•
•
functional verification before using a SetOTPparam
command to program and zap separately one OTP memory
byte. A GetOTPparam command issued after each
SetOTPparam command allows verifying the correct byte
zapping.
Note: zapped bits will really be “active” after a
GetOTPparam or a ResetToDefault command or
after a power−up.
Application Parameters Stored in OTP Memory
Except for the physical address <PA[3:0]> these
parameters, although programmed in a non−volatile
memory can still be overridden in RAM by a LIN writing
operation.
In the case of Stop mode 2, care needs to be taken
because the accumulated steploss can cause a
significant deviation between physical and stored actual
position.
The SetDualPosition command will only be
executed after clearing the <UV2> and <Steploss>
flags.
RAM reset occurs when V
level).
PA[3:0] In combination with HW[2:0] and ADM bit,
ADM Addressing mode bit enabling to swap the
StepMode1
SecPos3
IREF3
Vmin3
Ihold3
Acc3
Bit 3
BG3
PA3
it forms the physical address AD[6:0] of the
stepper−motor. Up to 128 stepper−motors can
theoretically be connected to the same LIN bus.
combination of OTP memory bits PA[3:0] with
hardwired address bits HW[2:0] to form the
physical address AD[6:0] of the stepper motor.
StepMode0
SecPos2
IREF2
Vmin2
Ihold2
Acc2
Bit 2
BG2
PA2
DD
< V
SecPos1
LOCKBT
IREF1
Vmin1
Ihold1
Bit 1
Acc1
DD
BG1
PA1
Reset (digital POR
(Note 24)
LOCKBG
SecPos0
IREF0
Vmin0
Ihold0
Bit 0
Acc0
BG0
PA0