ATA6824-PNQW Atmel, ATA6824-PNQW Datasheet - Page 9

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ATA6824-PNQW

Manufacturer Part Number
ATA6824-PNQW
Description
IC H-BRIDGE MOTOR DRIVER
Manufacturer
Atmel
Datasheet

Specifications of ATA6824-PNQW

Applications
DC Motor Controller
Number Of Outputs
1
Voltage - Supply
6.5 V ~ 21.3 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Voltage - Load
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
5.4
5.4.1
5.4.2
Figure 5-5.
4931L–AUTO–02/11
High Voltage Serial Interface
(input to transmitting Node)
(output of receiving Node 1)
(output of receiving Node 2)
TX
RX
RX
V
(Transceiver
supply
of transmitting
node)
Transmit Mode
Reset Mode
S
Definition of Bus Timing Parameters
TH
TH
TH
TH
Rec(max)
Dom(max)
Rec(min)
Dom(min)
A bi-directional bus interface is implemented for data transfer between hostcontroller and the
local microcontroller (SIO).
The transceiver consists of a low side driver (1.2V at 40mA) with slew rate control, wave shap-
ing, current limitation, and a high-voltage comparator followed by a debouncing unit in the
receiver.
During transmission, the data at the pin TX will be transferred to the bus driver to generate a
bus signal on pin SIO. The pin TX has a pull-down resistor included.
To minimize the electromagnetic emission of the bus line, the bus driver has an integrated
slew rate control and wave-shaping unit. In transmit mode, transmission will be interrupted in
case of overheating at the SIO driver.
In case of an active reset shown at pin /RESET the pin SIO is switched to low, independent of
the temperature. The maximum current is limited to I
The recessive BUS level is generated from the integrated 30k pull-up resistor in series with
an active diode. This diode prevents the reverse current of VBUS during differential voltage
between VSUP and BUS (V
t
Bit
t
rx_pdf(1)
SIO Signal
t
t
SIO_dom(min)
SIO_dom(max)
BUS
> V
SUP
).
t
Bit
t
rx_pdr(2)
t
SIO_rec(min)
t
SIO_rec(max)
t
rx_pdr(1)
SIO_LIM_RESET
t
Bit
Atmel ATA6824
.
Thresholds of
receiving node 1
Thresholds of
receiving node 2
t
rx_pdf(2)
9

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