MCZ33927EK Freescale Semiconductor, MCZ33927EK Datasheet - Page 13

• Manufacturer Part Number: MCZ33927EK
• Description: IC FET PRE-DRIVER 3PH 54-SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33927EK

• Configuration: 3 Phase Bridge
• Input Type: Inverting and Non-Inverting
• Delay Time: 265ns
• Current - Peak: 600mA
• Number Of Configurations: 1
• Number Of Outputs: 3
• High Side Voltage - Max (bootstrap): 75V
• Voltage - Supply: 8 V ~ 40 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 54-SOIC (7.5mm Width) Exposed Pad, 54-eSOIC, 54-HSOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

VBATT INPUT
should use an external diode to protect it from damage due
to reverse battery if this protection is desired. The voltage
drop of the diode must be taken into consideration when the
operating range of the system is being determined. This
diode is generally used to protect the entire module from
reverse battery and should be selected accordingly.
TIMER OSC
internal logic. It is the reference for some of the required
delays.
TIMERS
active for the required time after the conditions for sleep
mode have been met. It is also used to keep the TXD driver
active for a period of time after it has generated a passive
level on the bus.
MODE CONTROL
operating modes and conditions required for the IC.
BUS RCVR
level indicating the presence of a logic [0] or a logic [1]. It also
determines the presence of a high voltage wake-up (HVWU)
signal that is passed to Mode Control and Timers circuits. An
analog filter is used to “de-glitch” the high voltage wake-up
signal and prevent false exits from the Sleep mode.
Analog Integrated Circuit Device Data
Freescale Semiconductor
This power input is not reverse battery protected and
This circuit generates a 500 kHz signal to be used for
This circuit contains the timing logic used to hold the CNTL
This circuit contains the control logic for the various
This circuit translates the levels on the BUS pin to a CMOS
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Figure 6. Transmitter Delays in Normal and Transmit High Voltage Wake-up Modes
LOAD
GND
BUS
V
BATT
FUNCTIONAL BLOCK DIAGRAM COMPONENTS
6.49 kΩ
100 pF
BUS LOADING PARAMETERS
1.0 kΩ
47 μH
Note: The letter ’n’ represents the number of nodes in the system.
BUSMOD
BUS I /O
(ESD) and /or EMI external circuitry. A set of components is
shown in the simplified application diagrams on
value of the capacitor should be adjusted downward in direct
proportion to the added capacitance of the ESD or EMI
circuits. The series resistance of the inductor should be kept
below 3.5 Ω to prevent its voltage drop from significantly
degrading system noise margins.
TXD BUS DRVR
voltage wake-up signals when enabled by the Mode Control
circuit. It can also provide waveshaping for reduced EMI or
not provide it for the higher data rate mode. The actual data
is received on TXD at CMOS logic levels, then translated by
this circuit to the necessary operating voltages.
UNDER-VOLTAGE DETECT
proper operation of the part. If a low-voltage condition is
detected, it sends a signal to disable the BUS RCVR and
TXD BUS DRVR circuits. This prevents incorrect data from
being put on the bus or sent to the MCU.
LOAD SWITCH
connected to the BUS to be connected to ground. When a
loss of ground is detected, this switch is opened to prevent
the current that would normally be flowing to the ground from
the module from going back through the load resistor and
raising the bus level. The circuit is opened when the voltage
between GND and VBATT becomes too low as would be the
case if module ground were lost.
This input / output may require electrostatic discharge
This circuit drives the BUS. It can drive it with the higher
This circuit monitors internal operating voltage to assure
The LOAD switch provides a path for an external resistor
C
NOM
= 100 pF + (n -1) 220 pF
FUNCTIONAL BLOCK DIAGRAM COMPONENTS
FUNCTIONAL DESCRIPTION
R
=
6.49 kΩ
(n -1)
page
15. The
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