IXDI404SI-16 IXYS, IXDI404SI-16 Datasheet - Page 10

• Manufacturer Part Number: IXDI404SI-16
• Description: IC MOSFET DRVR LS 4A DUAL 16SOIC
• Manufacturer: IXYS
• Type: Low Side Gate Driverr

Specifications of IXDI404SI-16

• Configuration: Low-Side
• Input Type: Inverting
• Delay Time: 36ns
• Current - Peak: 4A
• Number Of Configurations: 2
• Number Of Outputs: 2
• Voltage - Supply: 4.5 V ~ 35 V
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC
• Rise Time: 18 ns
• Fall Time: 17 ns
• Supply Voltage (min): 4.5 V
• Supply Current: 3 mA
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Number Of Drivers: 2
• Output Current: 4 A
• For Use With: EVDI404 - BOARD EVALUATION IXDI404
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• High Side Voltage - Max (bootstrap): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIN CONFIGURATIONS
Supply Bypassing, Grounding Practices And Output Lead inductance
When designing a circuit to drive a high speed MOSFET
utilizing the IXDN404/IXDI404/IXDF404, it is very important to
observe certain design criteria in order to optimize performance
of the driver. Particular attention needs to be paid to Supply
Bypassing, Grounding, and minimizing the Output Lead
Inductance.
Say, for example, the IXDN404 is being used to charge a
2500pF capacitive load from 0 to 25 volts in 25ns.
Using the formula: I= ∆V C / ∆t, where ∆V=25V C=2500pF &
∆t=25ns, one can determine that to charge 2500pF to 25 volts
in 25ns will take a constant current of 2.5A. (In reality, the
charging current won’t be constant and will peak somewhere
around 4A).
SUPPLY BYPASSING
In order for the design to turn the load on properly, the IXDN404
must be able to draw this 2.5A of current from the power supply
in the 25ns. This means that there must be very low impedance
between the driver and the power supply. The most common
method of achieving this low impedance is to bypass the power
supply at the driver with a capacitance value that is a magnitude
larger than the load capacitance.
achieved by placing two different types of bypassing capacitors,
with complementary impedance curves, very close to the driver
itself. (These capacitors should be carefully selected, low
inductance, low resistance, high-pulse current-service
capacitors). Lead lengths may radiate at high frequency due
to inductance, so care should be taken to keep the lengths of
the leads between these bypass capacitors and the IXDN404
to an absolute minimum.
1
2
3
4
1
2
3
4
5
6
7
8
8 Lead PDIP (PI)
8 Pin SOIC (SI)
NC
IN A
GND
NC
IN A
NC
GND
GND
NC
INB
NC
IN B
IXDN404SI-16
16 Pin SOIC
IXDN404
O UT A
O UT A
O UT B
O UT A
O UT B
O UT B
VCC
VCC
NC
NC
NC
V
S
16
15
14
13
12
10
11
5
8
7
6
9
Usually, this would be
4
1
2
3
1
2
3
4
5
6
7
8
8 Lead PDIP (PI)
8 Pin SOIC (SI)
NC
IN A
GND
INB
NC
IN A
NC
GND
GND
NC
NC
IN B
16 Pin SOIC
IXDI404SI-16
IXDI404
O UT A
O UT B
O UT A
O UT A
O UT B
O UT B
10
VCC
VCC
NC
NC
NC
V
S
GROUNDING
In order for the design to turn the load off properly, the IXDN404
must be able to drain this 2.5A of current into an adequate
grounding system. There are three paths for returning current
that need to be considered: Path #1 is between the IXDN404
and its load. Path #2 is between the IXDN404 and its power
supply. Path #3 is between the IXDN404 and whatever logic is
driving it. All three of these paths should be as low in resistance
and inductance as possible, and thus as short as practical. In
addition, every effort should be made to keep these three
ground paths distinctly separate.
ground current from the load may develop a voltage that would
have a detrimental effect on the logic line driving the IXDN404.
OUTPUT LEAD INDUCTANCE
Of equal importance to Supply Bypassing and Grounding are
issues related to the Output Lead Inductance. Every effort
should be made to keep the leads between the driver and its
load as short and wide as possible. If the driver must be placed
farther than 2” (5mm) from the load, then the output leads
should be treated as transmission lines. In this case, a twisted-
pair should be considered, and the return line of each twisted
pair should be placed as close as possible to
of the driver, and connected directly to the ground terminal
of the load.
6
5
8
7
16
15
14
13
12
10
11
9
IXDN404 / IXDI404 / IXDF404
1
2
3
4
4
5
6
7
1
2
3
8
8 Lead PDIP (PI)
8 Pin SOIC (SI)
NC
IN A
GND
INB
GND
GND
NC
IN A
NC
NC
IN B
NC
Otherwise, the returning
16 Pin SOIC
IXDF404SI-16
IXDF404
O UT A
O UT B
O UT A
O UT A
O UT B
O UT B
VCC
VCC
NC
the ground pin
NC
NC
V
S
5
8
7
6
16
10
15
14
13
12
11
9